Low Voltage Analog to Digital Converter Design in 90nm CMOS

Simone Gambini and Jan M. Rabaey

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2007-17
January 18, 2007

http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-17.pdf

Advisor: Jan M. Rabaey


BibTeX citation:

@mastersthesis{Gambini:EECS-2007-17,
    Author = {Gambini, Simone and Rabaey, Jan M.},
    Title = {Low Voltage Analog to Digital Converter Design in 90nm CMOS},
    School = {EECS Department, University of California, Berkeley},
    Year = {2007},
    Month = {Jan},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-17.html},
    Number = {UCB/EECS-2007-17}
}

EndNote citation:

%0 Thesis
%A Gambini, Simone
%A Rabaey, Jan M.
%T Low Voltage Analog to Digital Converter Design in 90nm CMOS
%I EECS Department, University of California, Berkeley
%D 2007
%8 January 18
%@ UCB/EECS-2007-17
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-17.html
%F Gambini:EECS-2007-17