Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

On-Chip Networks Modeling and Simulation

Qi Zhu, Zhengya Zhang, Alessandro Pinto and Alberto L. Sangiovanni-Vincentelli

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2006-126
October 7, 2006

http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-126.pdf

We present an interconnect model library for the synthesis and design exploration of on-chip communication networks. This library can provide the energy and delay estimation interface to synthesis tools. We start from the definition of interconnect models at different abstract levels, and then estimate the energy consumption and delay of them. To help the synthesis which is oriented to the optimization of energy consumption, the library provides an interface to get the minimal energy within a given bandwidth bound. Furthermore, an quadratic approximation of the relation between energy and wire is proposed to make automatic synthesis easier and more quickly. Some examples on how the entire framework can be used are shown.


BibTeX citation:

@techreport{Zhu:EECS-2006-126,
    Author = {Zhu, Qi and Zhang, Zhengya and Pinto, Alessandro and Sangiovanni-Vincentelli, Alberto L.},
    Title = {On-Chip Networks Modeling and Simulation},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {2006},
    Month = {Oct},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-126.html},
    Number = {UCB/EECS-2006-126},
    Abstract = {We present an interconnect model library for the synthesis and design exploration of on-chip communication networks. This library can provide the energy and delay estimation interface to synthesis tools. We start from the definition of interconnect models at different abstract levels, and then estimate the energy consumption and delay of them. To help the synthesis which is oriented to the optimization of energy consumption, the library provides an interface to get the minimal energy within a given bandwidth bound. Furthermore, an quadratic approximation of the relation between energy and wire is proposed to make automatic synthesis easier and more quickly. Some examples on how the entire framework can be used are shown.}
}

EndNote citation:

%0 Report
%A Zhu, Qi
%A Zhang, Zhengya
%A Pinto, Alessandro
%A Sangiovanni-Vincentelli, Alberto L.
%T On-Chip Networks Modeling and Simulation
%I EECS Department, University of California, Berkeley
%D 2006
%8 October 7
%@ UCB/EECS-2006-126
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-126.html
%F Zhu:EECS-2006-126