Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Design and Implementation of the IRAM Architecture Manual and Functional Simulator

David R. Martin

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-98-1025
December 1998

http://www.eecs.berkeley.edu/Pubs/TechRpts/1998/CSD-98-1025.pdf

In a microprocessor project such as the Berkeley Intelligent RAM (IRAM) Project, there needs to be a golden architectural model that is simple, precise, and verifiable. For these reasons, the golden model is written as a computer program so that it can be compared to other models (e.g. RTL or gate-level) in an operational manner. Furthermore, the architectural model is often used for compiler, operating system, and application development, and consequently needs to be very fast. Thus, fast languages such as C++ or even assembly are common choices. In addition to a fast simulation environment, developers need good documentation. In a microprocessor project, the documentation needs to be up-to-date and correct with a high degree of confidence. This paper describes the approach taken in the IRAM project to derive the architectural simulator and architecture manual from a single source. This method disallows many types of inconsistencies between the model and the documentation of the model that can remain undetected in traditional approaches.


BibTeX citation:

@techreport{Martin:CSD-98-1025,
    Author = {Martin, David R.},
    Title = {Design and Implementation of the IRAM Architecture Manual and Functional Simulator},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1998},
    Month = {Dec},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1998/6406.html},
    Number = {UCB/CSD-98-1025},
    Abstract = {In a microprocessor project such as the Berkeley Intelligent RAM (IRAM) Project, there needs to be a golden architectural model that is simple, precise, and verifiable. For these reasons, the golden model is written as a computer program so that it can be compared to other models (e.g. RTL or gate-level) in an operational manner. Furthermore, the architectural model is often used for compiler, operating system, and application development, and consequently needs to be very fast. Thus, fast languages such as C++ or even assembly are common choices. In addition to a fast simulation environment, developers need good documentation. In a microprocessor project, the documentation needs to be up-to-date and correct with a high degree of confidence. This paper describes the approach taken in the IRAM project to derive the architectural simulator and architecture manual from a single source. This method disallows many types of inconsistencies between the model and the documentation of the model that can remain undetected in traditional approaches.}
}

EndNote citation:

%0 Report
%A Martin, David R.
%T Design and Implementation of the IRAM Architecture Manual and Functional Simulator
%I EECS Department, University of California, Berkeley
%D 1998
%@ UCB/CSD-98-1025
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1998/6406.html
%F Martin:CSD-98-1025