Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Torrent Architecture Manual

Krste Asanovic and David Johnson

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-97-930
January 1997

http://www.eecs.berkeley.edu/Pubs/TechRpts/1997/CSD-97-930.pdf

This manual contains the specification of the Torrent Instruction Set Architecture (ISA). Torrent is a vector ISA designed for digital signal processing applications. Torrent is based on the 32-bit MIPS-II ISA, and this manual is intended to be read as a supplement to the book "MIPS RISC Architecture" by Kane and Heinrich. Torrent is the ISA of the T0 vector microprocessor which is described in the separate "T0 Engineering Data" technical report.


BibTeX citation:

@techreport{Asanovic:CSD-97-930,
    Author = {Asanovic, Krste and Johnson, David},
    Title = {Torrent Architecture Manual},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1997},
    Month = {Jan},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1997/5413.html},
    Number = {UCB/CSD-97-930},
    Abstract = {This manual contains the specification of the Torrent Instruction Set Architecture (ISA). Torrent is a vector ISA designed for digital signal processing applications. Torrent is based on the 32-bit MIPS-II ISA, and this manual is intended to be read as a supplement to the book "MIPS RISC Architecture" by Kane and Heinrich. Torrent is the ISA of the T0 vector microprocessor which is described in the separate "T0 Engineering Data" technical report.}
}

EndNote citation:

%0 Report
%A Asanovic, Krste
%A Johnson, David
%T Torrent Architecture Manual
%I EECS Department, University of California, Berkeley
%D 1997
%@ UCB/CSD-97-930
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1997/5413.html
%F Asanovic:CSD-97-930