Integrated Circuit Process Design for Manufacturability Using Statistical Metrology

Crid Yu

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M96/47
1996

Advisor: Costas J. Spanos

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BibTeX citation:

@phdthesis{Yu:M96/47,
    Author = {Yu, Crid},
    Title = {Integrated Circuit Process Design for Manufacturability Using Statistical Metrology},
    School = {EECS Department, University of California, Berkeley},
    Year = {1996},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1996/3059.html},
    Number = {UCB/ERL M96/47}
}

EndNote citation:

%0 Thesis
%A Yu, Crid
%T Integrated Circuit Process Design for Manufacturability Using Statistical Metrology
%I EECS Department, University of California, Berkeley
%D 1996
%@ UCB/ERL M96/47
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1996/3059.html
%F Yu:M96/47

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