Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

A Physical Model for MOSFET Output Resistance

J.H. Huang, Z.H. Liu, M.C. Jeng, P.K. Ko and Chenming Hu

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M93/56
1993

http://www.eecs.berkeley.edu/Pubs/TechRpts/1993/ERL-93-56.pdf

The output resistance, R(out), is one of the most important device parameters for analog applications. However, it has been difficult to model R(out) correctly. In this paper, we present a physical and accurate output resistance model that can be applied to both long-channel and submicrometer MOSFETs. Major short channel effects and hot-carrier effect, such as channel-length modulation (CLM)[1], drain-induced-barrier-lowering (DIBL)[2][6][7] and substrate current induced output resistance reduction[3][4], are all included in this model, and it is scalable with respect to different channel length L, gate oxide thickness T(ox) and power supply V(dd). This model can be incorporated into any existing MOSFET's model without introducing any discontinuity.


BibTeX citation:

@techreport{Huang:M93/56,
    Author = {Huang, J.H. and Liu, Z.H. and Jeng, M.C. and Ko, P.K. and Hu, Chenming},
    Title = {A Physical Model for MOSFET Output Resistance},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1993},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1993/2394.html},
    Number = {UCB/ERL M93/56},
    Abstract = {The output resistance, R(out), is one of the most important device parameters for analog applications.  However, it has been difficult to model R(out) correctly.  In this paper, we present a physical and accurate output resistance model that can be applied to both long-channel and submicrometer MOSFETs.  Major short channel effects and hot-carrier effect, such as channel-length modulation (CLM)[1], drain-induced-barrier-lowering (DIBL)[2][6][7] and substrate current induced output resistance reduction[3][4], are all included in this model, and it is scalable with respect to different channel length L, gate oxide thickness T(ox) and power supply V(dd).  This model can be incorporated into any existing MOSFET's model without introducing any discontinuity.}
}

EndNote citation:

%0 Report
%A Huang, J.H.
%A Liu, Z.H.
%A Jeng, M.C.
%A Ko, P.K.
%A Hu, Chenming
%T A Physical Model for MOSFET Output Resistance
%I EECS Department, University of California, Berkeley
%D 1993
%@ UCB/ERL M93/56
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1993/2394.html
%F Huang:M93/56