Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Techniques for IC Symbolic Layout and Compaction

Jeffrey L. Burns

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M90/103
1990

Advisor: A. Richard Newton


BibTeX citation:

@phdthesis{Burns:M90/103,
    Author = {Burns, Jeffrey L.},
    Title = {Techniques for IC Symbolic Layout and Compaction},
    School = {EECS Department, University of California, Berkeley},
    Year = {1990},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1990/1634.html},
    Number = {UCB/ERL M90/103}
}

EndNote citation:

%0 Thesis
%A Burns, Jeffrey L.
%T Techniques for IC Symbolic Layout and Compaction
%I EECS Department, University of California, Berkeley
%D 1990
%@ UCB/ERL M90/103
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1990/1634.html
%F Burns:M90/103