Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

A Simple MOSFET Model for Circuit Analysis and Its Application to CMOS Gate Delay Analysis and Series-Connected MOSFET Structure

T. Sakurai and A. Richard Newton

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M90/19
1990

http://www.eecs.berkeley.edu/Pubs/TechRpts/1990/ERL-90-19.pdf

A simple, general and realistic MOSFET model is introduced. The model can express the current characteristics of short-channel MOSFETs at least down to .25 micro meter channel length, GaAs FET, and resistance inserted MOSFETs. The model evaluation time is about 1/3 of the evaluation time of the SPICE3 MOS LEVEL3 model. The model parameter extraction is done by solving single variable equations and thus can be done within a second, being different from the fitting procedure with expensive numerical iterations employed for the conventional models. The model also enables analytical treatments of circuits in short-channel region and makes up for a missing link between a complicated MOSFET current characteristics and circuit behaviors in the deep submicron region.


BibTeX citation:

@techreport{Sakurai:M90/19,
    Author = {Sakurai, T. and Newton, A. Richard},
    Title = {A Simple MOSFET Model for Circuit Analysis and Its Application to CMOS Gate Delay Analysis and Series-Connected MOSFET Structure},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1990},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1990/1429.html},
    Number = {UCB/ERL M90/19},
    Abstract = {A simple, general and realistic MOSFET model is introduced. The model can express the current characteristics of short-channel MOSFETs at least down to .25 micro meter channel length, GaAs FET, and resistance inserted MOSFETs.  The model evaluation time is about 1/3 of the evaluation time of the SPICE3 MOS LEVEL3 model.  The model parameter extraction is done by solving single variable equations and thus can be done within a second, being different from the fitting procedure with expensive numerical iterations employed for the conventional models. The model also enables analytical treatments of circuits in short-channel region and makes up for a missing link between a complicated MOSFET current characteristics and circuit behaviors in the deep submicron region.}
}

EndNote citation:

%0 Report
%A Sakurai, T.
%A Newton, A. Richard
%T A Simple MOSFET Model for Circuit Analysis and Its Application to CMOS Gate Delay Analysis and Series-Connected MOSFET Structure
%I EECS Department, University of California, Berkeley
%D 1990
%@ UCB/ERL M90/19
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1990/1429.html
%F Sakurai:M90/19