Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

A Computer Aided Design Methodology For Printed Circuit Boards

Linda G. Bushnell and Vason P. Srini

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-89-492
January 1989

http://www.eecs.berkeley.edu/Pubs/TechRpts/1989/CSD-89-492.pdf

We present a design methodology for realizing VLSI printed circuit board (PCB) designs using Computer Aided Design (CAD) tools on powerful workstations. The workstation and CAD tools allow one to create a gate-level design using TTL parts and interconnecting wires, simulate the functionality and timing of the gate-level design, package the design's TTL parts into PCB parts, place and route the PCB, create manufacturing data, and simulate the design at the board-level. A design example, the VLSI-PLM PC Board being developed at the University of California at Berkeley, is given to illustrate this procedure. The VLSI-PLM PC Board is a processor board for the VLSI-PLM Chip [SRINI], which is a high performance CMOS processor for executing computer programs written in the Prolog language.


BibTeX citation:

@techreport{Bushnell:CSD-89-492,
    Author = {Bushnell, Linda G. and Srini, Vason P.},
    Title = {A Computer Aided Design Methodology For Printed Circuit Boards},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1989},
    Month = {Jan},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1989/6171.html},
    Number = {UCB/CSD-89-492},
    Abstract = {We present a design methodology for realizing VLSI printed circuit board (PCB) designs using Computer Aided Design (CAD) tools on powerful workstations. The workstation and CAD tools allow one to create a gate-level design using TTL parts and interconnecting wires, simulate the functionality and timing of the gate-level design, package the design's TTL parts into PCB parts, place and route the PCB, create manufacturing data, and simulate the design at the board-level. A design example, the VLSI-PLM PC Board being developed at the University of California at Berkeley, is given to illustrate this procedure. The VLSI-PLM PC Board is a processor board for the VLSI-PLM Chip [SRINI], which is a high performance CMOS processor for executing computer programs written in the Prolog language.}
}

EndNote citation:

%0 Report
%A Bushnell, Linda G.
%A Srini, Vason P.
%T A Computer Aided Design Methodology For Printed Circuit Boards
%I EECS Department, University of California, Berkeley
%D 1989
%@ UCB/CSD-89-492
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1989/6171.html
%F Bushnell:CSD-89-492