SOVAR: Smart Memories for Out-of-Order Execution VLSI Architectures
Gregory A. Uvieghara
EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M89/41
1989
Advisor: David A. Hodges
BibTeX citation:
@phdthesis{Uvieghara:M89/41,
Author = {Uvieghara, Gregory A.},
Title = {SOVAR: Smart Memories for Out-of-Order Execution VLSI Architectures},
School = {EECS Department, University of California, Berkeley},
Year = {1989},
URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1989/1215.html},
Number = {UCB/ERL M89/41}
}
EndNote citation:
%0 Thesis %A Uvieghara, Gregory A. %T SOVAR: Smart Memories for Out-of-Order Execution VLSI Architectures %I EECS Department, University of California, Berkeley %D 1989 %@ UCB/ERL M89/41 %U http://www.eecs.berkeley.edu/Pubs/TechRpts/1989/1215.html %F Uvieghara:M89/41