Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Dynamically Reconfigurable Systems Research

Vason P. Srini

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-88-441
August 1988

http://www.eecs.berkeley.edu/Pubs/TechRpts/1988/CSD-88-441.pdf

Computer systems that are capable of undergoing changes in the semantics or the interconnection of their modules in a dynamic way, called dynamic reconfiguration, are considered. The problems that must be addressed to change the semantics of a module are discussed. The change to the semantics of a module or their interconnection can be based on local information, global information, or a combination of both. Ways to effect changes when conflicts exist between local and global information are also discussed. Algorithms for reconfiguring the modules when data dependency constraints are present have been developed. Changing the semantics or the interconnection structure of a module may induce changes in other modules. Systematic ways to deduce induced changes have been developed. Protocols have also been developed for communicating reconfiguration information between modules.

A methodology based on the dataflow principles has been devised for designing reconfigurable systems. The nodes in the dataflow graph can store state information. These nodes are used to represent global and local controllers. The design of a sample operating system has been outlined using the dataflow methodology. Since interprocess communication is one of the key issues in reconfiguration, a multiprocessor architecture has been developed to support this. A separate synchronization memory is used in the multiprocessor for storing status information, process table, join table, and other data structures needed for interprocess communication. Simulation results show that fast interprocess communication is achievable with the synchronizing memory.

The report contains four chapters. The issues in reconfiguration and some applications are described in Chapter 1. The steps that must be taken to reconfigure a system are outlined in Chapter 2. It is based on an extended dataflow methodology which has been published as a paper. The application of the methodology to design a distributed operating system is described in Chapter 3. A system architecture capable of supporting reconfiguration is also shown in Chapter 3. The architecture support for fast interprocess communication (IPC) is described in Chapter 4. Dynamic memory management and process management for the parallel execution of Prolog programs on the proposed system architecture are used to illustrate the fast IPC.


BibTeX citation:

@techreport{Srini:CSD-88-441,
    Author = {Srini, Vason P.},
    Title = {Dynamically Reconfigurable Systems Research},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1988},
    Month = {Aug},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1988/5278.html},
    Number = {UCB/CSD-88-441},
    Abstract = {Computer systems that are capable of undergoing changes in the semantics or the interconnection of their modules in a dynamic way, called dynamic reconfiguration, are considered. The problems that must be addressed to change the semantics of a module are discussed.  The change to the semantics of a module or their interconnection can be based on local information, global information, or a combination of both. Ways to effect changes when conflicts exist between local and global information are also discussed. Algorithms for reconfiguring the modules when data dependency constraints are present have been developed. Changing the semantics or the interconnection structure of a module may induce changes in other modules. Systematic ways to deduce induced changes have been developed. Protocols have also been developed for communicating reconfiguration information between modules. <p>A methodology based on the dataflow principles has been devised for designing reconfigurable systems. The nodes in the dataflow graph can store state information. These nodes are used to represent global and local controllers. The design of a sample operating system has been outlined using the dataflow methodology. Since interprocess communication is one of the key issues in reconfiguration, a multiprocessor architecture has been developed to support this. A separate synchronization memory is used in the multiprocessor for storing status information, process table, join table, and other data structures needed for interprocess communication. Simulation results show that fast interprocess communication is achievable with the synchronizing memory. <p>The report contains four chapters. The issues in reconfiguration and some applications are described in Chapter 1. The steps that must be taken to reconfigure a system are outlined in Chapter 2. It is based on an extended dataflow methodology which has been published as a paper. The application of the methodology to design a distributed operating system is described in Chapter 3. A system architecture capable of supporting reconfiguration is also shown in Chapter 3. The architecture support for fast interprocess communication (IPC) is described in Chapter 4. Dynamic memory management and process management for the parallel execution of Prolog programs on the proposed system architecture are used to illustrate the fast IPC.}
}

EndNote citation:

%0 Report
%A Srini, Vason P.
%T Dynamically Reconfigurable Systems Research
%I EECS Department, University of California, Berkeley
%D 1988
%@ UCB/CSD-88-441
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1988/5278.html
%F Srini:CSD-88-441