Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Estimating Performance of Single Bus, Shared Memory Multiprocessors

Garth A. Gibson

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-87-355
May 1987

http://www.eecs.berkeley.edu/Pubs/TechRpts/1987/CSD-87-355.pdf

Given standard characteristics of processors and memory, we present two simple ways of estimating the performance of shared memory multiprocessors. At the cost of a few simple arithmetic operations, a computer designer can estimate the range of performance using our "4-point bound" model. If more accuracy is required, we show that a one page program can estimate performance within 3% of trace-driven simulation, while reducing software development time, disk space, and CPU time by orders of magnitude. To demonstrate the use of our models, an application to the SPUR multiprocessor design is presented.


BibTeX citation:

@techreport{Gibson:CSD-87-355,
    Author = {Gibson, Garth A.},
    Title = {Estimating Performance of Single Bus, Shared Memory Multiprocessors},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1987},
    Month = {May},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1987/6214.html},
    Number = {UCB/CSD-87-355},
    Abstract = {Given standard characteristics of processors and memory, we present two simple ways of estimating the performance of shared memory multiprocessors. At the cost of a few simple arithmetic operations, a computer designer can estimate the range of performance using our "4-point bound" model. If more accuracy is required, we show that a one page program can estimate performance within 3% of trace-driven simulation, while reducing software development time, disk space, and CPU time by orders of magnitude. To demonstrate the use of our models, an application to the SPUR multiprocessor design is presented.}
}

EndNote citation:

%0 Report
%A Gibson, Garth A.
%T Estimating Performance of Single Bus, Shared Memory Multiprocessors
%I EECS Department, University of California, Berkeley
%D 1987
%@ UCB/CSD-87-355
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1987/6214.html
%F Gibson:CSD-87-355