Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Combining Graphics and Procedures in a VLSI Layout Tool: The Tpack System

Robert N. Mayo

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-84-166
January 1984

http://www.eecs.berkeley.edu/Pubs/TechRpts/1984/CSD-84-166.pdf

Tpack is a system for VLSI module generation that uses both graphical and procedural information. A graphical editor is used to specify tiles of mask information, then procedures are written to arrange the tiles into modules. This technique combines the visual power of graphical systems with the programming power of procedural systems. Since all of the mask information is contained in the tiles, the same procedures may be used for different design rules or technologies, merely by supplying a different set of tiles. This paper describes the procedural and graphical interfaces, and discusses two module generators that have been built with them.


BibTeX citation:

@techreport{Mayo:CSD-84-166,
    Author = {Mayo, Robert N.},
    Title = {Combining Graphics and Procedures in a VLSI Layout Tool:  The Tpack System},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1984},
    Month = {Jan},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1984/5979.html},
    Number = {UCB/CSD-84-166},
    Abstract = {Tpack is a system for VLSI module generation that uses both graphical and procedural information. A graphical editor is used to specify tiles of mask information, then procedures are written to arrange the tiles into modules. This technique combines the visual power of graphical systems with the programming power of procedural systems. Since all of the mask information is contained in the tiles, the same procedures may be used for different design rules or technologies, merely by supplying a different set of tiles. This paper describes the procedural and graphical interfaces, and discusses two module generators that have been built with them.}
}

EndNote citation:

%0 Report
%A Mayo, Robert N.
%T Combining Graphics and Procedures in a VLSI Layout Tool:  The Tpack System
%I EECS Department, University of California, Berkeley
%D 1984
%@ UCB/CSD-84-166
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1984/5979.html
%F Mayo:CSD-84-166