Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

RAMP: Gate-Array, Standard-Cell and Masterimage Placement Manual

C.K. Cheng and Ernest S. Kuh

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M84/71
1984

http://www.eecs.berkeley.edu/Pubs/TechRpts/1984/ERL-84-71.pdf

RAMP is an acronym for Resistive Analog Module Placement System. It utilizes the analogy of resistive network to tackle the placement problems, especially the problems of very large scalled integrated circuits. Currently, the system is implemented for the Gate-Array, Standard-Cell and Masterimage Approaches.


BibTeX citation:

@techreport{Cheng:M84/71,
    Author = {Cheng, C.K. and Kuh, Ernest S.},
    Title = {RAMP: Gate-Array, Standard-Cell and Masterimage Placement Manual},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1984},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1984/367.html},
    Number = {UCB/ERL M84/71},
    Abstract = {RAMP is an acronym for Resistive Analog Module Placement System.
It utilizes the analogy of resistive network to tackle the placement
problems, especially the problems of very large scalled integrated
circuits.  Currently, the system is implemented for the Gate-Array,
Standard-Cell and Masterimage Approaches.}
}

EndNote citation:

%0 Report
%A Cheng, C.K.
%A Kuh, Ernest S.
%T RAMP: Gate-Array, Standard-Cell and Masterimage Placement Manual
%I EECS Department, University of California, Berkeley
%D 1984
%@ UCB/ERL M84/71
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1984/367.html
%F Cheng:M84/71