Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

A Big RISC

Richard A. Blomseth

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-83-143
July 1983

http://www.eecs.berkeley.edu/Pubs/TechRpts/1983/CSD-83-143.pdf

Big RISC (BRISC) is a high-speed CPU designed with 100K ECL logic and based on the RISC I architecture. Design, performance, and cost of BRISC is presented. Performance is shown to be better than high end mainframes such as the IBM 3081 and Amdahl 470V/8 on integer benchmarks written in C, Pascal and LISP. The cost, conservatively estimated to be $132,400 is about the same as a high end minicomputer such as the VAX-11/780. BRISC has a CPU cycle time of 46 ns, providing a RISC I instruction execution rate of greater than 15 MIPs. BRISC is designed with a Structured Computer Aided Logic Design System (SCALD) by Valid Logic Systems. An evaluation of the utility of SCALD for computer design is also included.


BibTeX citation:

@techreport{Blomseth:CSD-83-143,
    Author = {Blomseth, Richard A.},
    Title = {A Big RISC},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1983},
    Month = {Jul},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/1983/5454.html},
    Number = {UCB/CSD-83-143},
    Abstract = {Big RISC (BRISC) is a high-speed CPU designed with 100K ECL logic and based on the RISC I architecture. Design, performance, and cost of BRISC is presented. Performance is shown to be better than high end mainframes such as the IBM 3081 and Amdahl 470V/8 on integer benchmarks written in C, Pascal and LISP. The cost, conservatively estimated to be $132,400 is about the same as a high end minicomputer such as the VAX-11/780.  BRISC has a CPU cycle time of 46 ns, providing a RISC I instruction execution rate of greater than 15 MIPs. BRISC is designed with a Structured Computer Aided Logic Design System (SCALD) by Valid Logic Systems. An evaluation of the utility of SCALD for computer design is also included.}
}

EndNote citation:

%0 Report
%A Blomseth, Richard A.
%T A Big RISC
%I EECS Department, University of California, Berkeley
%D 1983
%@ UCB/CSD-83-143
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/1983/5454.html
%F Blomseth:CSD-83-143