Patents - 2007

Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance
Chien Chao Huang, Yee Chia Yeo, Kuo Nan Yang, Chun Chieh Lin and Chenming Hu
U.S. Patent 7,312,136. December 2007

Ultra broadband mirror using subwavelength grating
Constance Chang-Hasnain, Carlos Fernando Rondina Mateus and Michael Chung-Yi Huang
U.S. Patent 7,304,781. December 2007

Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
Yee Chia Yeo, Fu Liang Yang and Chenming Hu
U.S. Patent 7,301,206. November 2007

Methods and apparatus for low distortion parameter measurements
Dean Hunt, Costas J. Spanos, Michael Welch, Kameshwar Poolla and Mason L. Freed
U.S. Patent 7,299,148. November 2007

High-Q micromechanical resonator devices and filters utilizing same
Clark Nguyen and Sheng-Shian Li
U.S. Patent 7,295,088. November 2007

Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling
Chao Yuan Su, Pei Haw Tsao, Hsin Hui Lee, Chender Huang, Shang Y. Hou, Shin Puu Jing, Hao Yi Tsai and Chenming Hu
U.S. Patent 7,294,937. November 2007

Noise-tolerant signaling schemes supporting simplified timing and data recovery
Andrew Ho, Vladimir Stojanovic, Fred F. Chen, Elad Alon and Mark A. Horowitz
U.S. Patent 7,292,637. November 2007

System and technique for fine-grained computer memory protection
Krste Asanovic and Emmett J. Witchel
U.S. Patent 7,287,140. October 2007

Maintenance unit for a sensor apparatus
Mason L. Freed, Randall S. Mundt and Costas J. Spanos
U.S. Patent 7,282,889. October 2007

Semiconductor device with high-k gate dielectric and quasi-metal gate, and method of forming thereof
Chih Hao Wang, Ching Wei Tsai and Chenming Hu
U.S. Patent 7,279,756. October 2007

Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
Yee Chia Yeo, How Yu Chen, Chien Chao Huang, Wen Chin Lee, Fu Liang Yang and Chenming Hu
U.S. Patent 7,268,024. September 2007

Compact static memory cell with non-volatile storage capability
Tsu-Jae King Liu
U.S. Patent 7,266,010. September 2007

Interconnect with composite layers and method for fabricating the same
Chen Hua Yu, Horng Huei Tseng, Syun Ming Jang and Chenming Hu
U.S. Patent 7,265,447. September 2007

Method of IC production using corrugated substrate
Tsu-Jae King Liu and Victor Moroz
U.S. Patent 7,265,008. September 2007

Contacts to semiconductor fin devices
Yee Chia Yeo, Fu Liang Yang and Chenming Hu
U.S. Patent 7,262,086. August 2007

Damascene process for use in fabricating semiconductor structures having micro/nano gaps
Hideki Takeuchi, Emmanuel P. Quevy, Tsu-Jae King Liu and Roger T. Howe
U.S. Patent 7,256,107. August 2007

Method of making adaptive negative differential resistance device
Tsu-Jae King Liu
U.S. Patent 7,254,050. August 2007

Segmented channel MOS transistor
Tsu-Jae King Liu
U.S. Patent 7,247,887. July 2007

Method for fabricating a body contact in a FinFET structure and a device including the same
Kuo Nan Yang, Yi Lang Chen, Hou Yu Chen, Fu Liang Yang and Chenming Hu
U.S. Patent 7,244,640. July 2007

Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement
Yee Chia Yeo, Chun Chieh Lin, Fu Liang Yang, Mong song Liang and Chenming Hu
U.S. Patent 7,238,989. July 2007

Adhesive microstructure and method of forming same
Robert J. Full, Ronald S. Fearing, Thomas W. Kenny and Kellar Autumn
U.S. Patent 7,229,685. June 2007

Phase-shifting test mask patterns for characterizing illumination polarization balance in image forming optical systems
Gregory R. McIntyre and Andrew R. Neureuther
U.S. Patent 7,224,458. May 2007

Integrated, fluorescence-detecting microanalytical system
J. Alex Chediak, Zhongsheng Luo, Timothy D. Sands, Nathan W. Cheung, Luke P. Lee and Jeonggi Seo
U.S. Patent 7,221,455. May 2007

Process for controlling performance characteristics of a negative differential resistance (NDR) device
Tsu-Jae King Liu
U.S. Patent 7,220,636. May 2007

CMOS inverters configured using multiple-gate transistors
Yee Chia Yeo, Fu Liang Yang and Chenming Hu
U.S. Patent 7,214,991. May 2007

Method and apparatus for equipment matching and characterization
Kameshwar Poolla
U.S. Patent 7,212,950. May 2007

Strained silicon structure
Chung Hu Ge, Wen Chin Lee and Chenming Hu
U.S. Patent 7,208,754. April 2007

CMOS logic gate fabricated on hybrid crystal orientations and method of forming thereof
Hung Wei Chen, Ping Kun Wu, Chao Hsiung Wang, Fu Liang Yang and Chenming Hu
U.S. Patent 7,208,815. April 2007

Cobalt silicidation process for substrates with a silicon--germanium layer
Chien Chao Huang, Yee Chia Yeo, Chao Hsiung Wang, Chun Chieh Lin and Chenming Hu
U.S. Patent 7,202,122. April 2007

High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation
Vladimir M. Stojanovic, Andrew Ho, Anthony Bessios, Fred F. Chen, Elad Alon and Mark A. Horowitz
U.S. Patent 7,199,615. April 2007

Adaptive control for mitigating interference in a multimode transmission medium
Joseph M. Kahn, Mark A. Horowitz, Elad Alon and Vladimir M. Stojanovic
U.S. Patent 7,194,155. March 2007

Integrated circuit on corrugated substrate
Tsu-Jae King Liu and Victor Moroz
U.S. Patent 7,190,050. March 2007

High performance tunneling-biased MOSFET and a process for its manufacture
Kuo-Nan Yang, Yi-Ling Chang, You-Lin Chu, Hou-Yu Chen, Fu-Liang Yang and Chenming Hu
U.S. Patent 7,187,000. March 2007

Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects
Tsu-Jae King
U.S. Patent 7,187,028. March 2007

Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET
Tsu-Jae King
U.S. Patent 7,186,619. March 2007

Method of forming a negative differential resistance device
Tsu-Jae King
U.S. Patent 7,186,621. March 2007

Heterostructure resistor and method of forming the same
Yee-Chia Yeo, Wen-Chin Lee, Chih-Hsin Ko, Chung-Hu Ge, Chun-Chieh Lin and Chenming Hu
U.S. Patent 7,183,593. February 2007

Method for dicing semiconductor wafers
Hsin-Hui Lee, Chien-Chao Huang, Chao-Hsiung Wang, Fu-Liang Yang and Chenming Hu
U.S. Patent 7,183,137. February 2007

Methods and structures for planar and multiple-gate transistors formed on SOI
Fu-Liang Yang, Yee-Chia Yeo and Chenming Hu
U.S. Patent 7,180,134. February 2007

Structure having nano-fibers on annular curved surface, method of making same and method of using same to adhere to a surface
Steven D. Jones and Ronald S. Fearing
U.S. Patent 7,175,723. February 2007

Narrowband noise mitigation in location-determining signal processing
Nainesh Agarwal, Anant Sahai and John Tsitsiklis
U.S. Patent 7,177,614. February 2007

Gate electrode for a semiconductor fin device
Yee-Chia Yeo, Hao-Yu Chen, Fu-Liang Yang and Chenming Hu
U.S. Patent 7,176,092. February 2007

Self-aligned contact for silicon-on-insulator devices
Fu-Liang Yang, Yee-Chia Yeo, Horng-Huei Tseng and Chenming Hu
U.S. Patent 7,173,305. February 2007

Multiple-gate transistors formed on bulk substrates
Yee-Chia Yeo, Fu-Liang Yang and Chenming Hu
U.S. Patent 7,172,943. February 2007

Web fabrication of devices
Mark A. Hadley, Ann Chiang, Gordon S. W. Craig, Jeffrey Jay Jacobsen, John Stephen Smith, Jay Tu and Roger Green Stewart
U.S. Patent 7,172,910. February 2007

Methods and apparatus for fluidic self assembly
John Stephen Smith, Mark A. Hadley, Gordon S. W. Craig and Frank Lowe
U.S. Patent 7,172,789. February 2007

Hybrid fractional-bit systems
Chenming Hu and Guobiao Zhang
U.S. Patent 7,167,109. January 2007

Synthesizing coherent correlation sums at one or multiple carrier frequencies using correlation sums calculated at a coarse set of frequencies
Anant Sahai and John Tsitsiklis
U.S. Patent 7,164,736. January 2007

Methods and apparatus for transmitting information between a basestation and multiple mobile stations
Pramod Viswanath, Rajiv Laroia and David N. C. Tse
U.S. Patent 7,162,211. January 2007

Vertically stacked field programmable nonvolatile memory and method of fabrication
James M. Cleeves and Vivek Subramanian
U.S. Patent 7,160,761. January 2007

Controlled cleaving process
Francois J. Henley and Nathan W. Cheung
U.S. Patent 7,160,790. January 2007

Microfabricated reactor
M. Allen Northrup and Richard M. White
U.S. Patent 7,169,601. January 2007

Transparent optimization for session establishment using characterized synchronization packet
Balraj Singh, Amit P. Singh and Vern Paxson
U.S. Patent 7,158,522. January 2007

Vertically stacked field programmable nonvolatile memory and method of fabrication
Vivek Subramanian and James M. Cleeves
U.S. Patent 7,157,314. January 2007

Strained silicon-on-insulator transistors with mesa isolation
Yee-Chia Yeo and Chenming Hu
U.S. Patent 7,157,774. January 2007