Patents - Andreas Kuehlmann

Framework for multiple-engine based verification tools for integrated circuits
Jason Raymond Baumgartner, Geert Janssen, Andreas Kuehlmann, Viresh Paruthi and Louise Helen Trevillyan
U.S. Patent 6,698,003. February 2004

Method and system for equivalence-checking combinatorial circuits using iterative binary-decision-diagram sweeping and structural satisfiability analysis
Malay Kumar Ganai, Geert Janssen, Florian Karl Krohm, Andreas Kuehlmann and Viresh Paruthi
U.S. Patent 6,473,884. October 2002

Method for performing functional comparison of combinational circuits
Andreas Kuehlmann and Florian Karl Krohm
U.S. Patent 6,035,107. March 2000

CMOS transistor network to gate level model extractor for simulation, verification and test generation
Sandip Kundu, Andreas Kuehlmann and Arvind Srinivasan
U.S. Patent 5,629,858. May 1997