Faculty Publications - Elad Alon

Book chapters or sections

• L. T. Wang, W. J. Poppe, L. Pang, A. R. Neureuther, E. Alon, and B. Nikolic, "Hypersensitive parameter-identifying ring oscillators for lithography process monitoring," in Design for Manufacturability Through Design-Process Integration II, V. K. Singh and M. L. Rieger, Eds., Proceedings of SPIE, Vol. 6925, Bellingham, WA: SPIE -- Society of Photo-Optical Instrumentation Engineers, 2008, pp. 69250P-1-10.

Articles in journals or magazines

• M. Tabesh, J. Chen, C. Marcu, L. Kong, S. Kang, A. Niknejad, and E. Alon, "A 65 nm CMOS 4-Element Sub-34 mW/Element 60 GHz Phased-Array Transceiver," IEEE Journal of Solid-State Circuits, vol. 46, no. 12, pp. 3018-3032, Dec. 2011. [abstract]
• H. Kam, T. King Liu, V. Stojanovic, D. Markovic, and E. Alon, "Design, Optimization, and Scaling of MEM Relays for Ultra-Low-Power Digital Logic," Electron Devices, IEEE Transactions on, vol. 58, no. 1, pp. 236 -250, Jan. 2011. [abstract]
• M. Spencer, F. Chen, C. Wang, R. Nathanael, H. Fariborzi, A. Gupta, H. Kam, V. Pott, J. Jeon, T. K. Liu, D. Markovic, E. Alon, and V. Stojanovic, "Demonstration of Integrated Micro-Electro-Mechanical Relay Circuits for VLSI Applications," Solid-State Circuits, IEEE Journal of, vol. 46, no. 1, pp. 308 -320, Jan. 2011. [abstract]
• V. Pott, H. Kam, R. Nathanael, J. Jeon, E. Alon, and T. King Liu, "Mechanical Computing Redux: Relays for Integrated Circit Applications," Proceedigs of the IEEE, vol. 98, no. 12, pp. 2076, Dec. 2010. [abstract]
• J. Jeon, V. Pott, H. Kam, R. Nathanael, E. Alon, and T. King Liu, "Seesaw Relay Logic and Memory Circuits," Microelectromechanical Systems, Journal of, vol. 19, no. 4, pp. 1012 -1014, Aug. 2010. [abstract]
• R. Nathanael, V. Pott, H. Kam, J. Jeon, E. Alon, and T. King Liu, "Four-Terminal-Relay Body-Biasing Schemes for Complementary Logic Circuits," Electron Device Letters, IEEE, vol. 31, no. 8, pp. 890 -892, Aug. 2010. [abstract]
• R. Ho, F. Liu, D. Patil, X. Zheng, G. Li, I. Shubin, E. Alon, J. Lexau, H. Schwetman, and J. Cunningham, "Optical interconnect for high-end computer systems," IEEE Design and Test of Computers, vol. 27, no. 4, July 2010.
• J. Jeon, V. Pott, H. Kam, R. Nathanael, E. Alon, and T. King Liu, "Perfectly Complementary Relay Design for Digital Logic Applications," Electron Device Letters, IEEE, vol. 31, no. 4, pp. 371 -373, April 2010.
• C. Marcu, D. Chowdhury, C. Thakkar, J. Park, L. Kong, M. Tabesh, Y. Wang, B. Afshar, A. Gupta, A. Arbabian, S. Gambini, R. Zamani, E. Alon, and A. Niknejad, "A 90nm CMOS Low-Power 60GHz Transceiver With Integrated Baseband Circuitry," IEEE Journal of Solid-State Circuits, vol. 44, no. 12, pp. 3434-3447, Dec. 2009. [abstract]
• C. Marcu, D. Chowdhury, C. Thakkar, J. Park, L. Kong, M. Tabesh, Y. Wang, B. Afshar, A. Gupta, A. Arbabian, S. Gambini, R. Zamani, E. Alon, and A. Niknejad, "A 90 nm CMOS Low-Power 60 GHz Transceiver With Integrated Baseband Circuitry," Solid-State Circuits, IEEE Journal of, vol. 44, no. 12, pp. 3434 -3447, Dec. 2009.
• B. Nezamfar, E. Alon, and M. Horowitz, "Energy-Performance Tunable Logic," Solid-State Circuits, IEEE Journal of, vol. 44, no. 9, pp. 2554 -2567, Sep. 2009.
• E. Alon, V. Abramzon, B. Nezamfar, and M. Horowitz, "On-Die Power Supply Noise Measurement Techniques," Advanced Packaging, IEEE Transactions on, vol. 32, no. 2, pp. 248-259, May 2009.
• E. Alon and M. Horowitz, "Integrated Regulation for Energy-Efficient Digital Circuits," IEEE J. Solid State Circuits, vol. 43, no. 8, pp. 1795-1807, Aug. 2008.
• M. Horowitz, D. Stark, and E. Alon, "Digital circuit design trends," IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 757-761, April 2008.
• E. Alon, J. Kim, S. Pamarti, K. Chang, and M. Horowitz, "Replica Compensated Linear Regulators for Supply-Regulated Phase-Locked Loops," IEEE J. Solid-State Circuits, vol. 41, no. 2, pp. 413-424, Feb. 2006.
• S. Naffziger, B. Stackhouse, T. Grutkowski, D. Josephson, J. Desai, E. Alon, and M. Horowitz, "The implementation of a 2-core, multi-threaded itanium family processor," IEEE J. Solid-State Circuits, vol. 41, no. 1, pp. 197-209, Jan. 2006.
• E. Alon, V. Stojanovic, and M. A. Horowitz, "Circuits and Techniques for High-Resolution Measurement of On-Chip Power Supply Noise," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 820-828, April 2005.
• V. Stojanovic, A. Ho, B. W. Garlepp, F. Chen, J. Wei, G. Tsang, E. Alon, R. T. Kollipara, C. W. Werner, J. L. Zerbe, and M. A. Horowitz, "Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 1012-1026, April 2005.
• K. Mai, R. Ho, E. Alon, D. Liu, Y. Kim, D. Patil, and M. A. Horowitz, "Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-mu m CMOS," IEEE J. Solid-State Circuits, vol. 40, no. 1, pp. 261-275, Jan. 2005.

Articles in conference proceedings

• M. Tabesh, J. Chen, C. Marcu, L. Kong, S. Kang, E. Alon, and A. Niknejad, "A 65nm CMOS 4-Element Sub-34mW/Element 60GHz Phased-Array Transceiver," in International Solid-State Circuits Conference, 2011.
• J. Crossley, E. Naviasky, and E. Alon, "An energy-efficient ring-oscillator digital PLL," in Custom Integrated Circuits Conference (CICC), 2010 IEEE, 2010, pp. 1--4.
• H. Kam, E. Alon, and T. King Liu, "A predictive contact reliability model for MEM logic switches," in Electron Devices Meeting (IEDM), 2010 IEEE International, 2010, pp. 16.4.1 -16.4.4. [abstract]
• T. King Liu, J. Jeon, R. Nathanael, H. Kam, V. Pott, and E. Alon, "Prospects for MEM logic switch technology," in Electron Devices Meeting (IEDM), 2010 IEEE International, 2010, pp. 18.3.1 -18.3.4. [abstract]
• J. Crossley, E. Naviasky, and E. Alon, "An energy-efficient ring-oscillator digital PLL," in Custom Integrated Circuits Conference (CICC), 2010 IEEE, 2010, pp. 1 -4. [abstract]
• D. Chowdhury, L. Ye, E. Alon, and A. Niknejad, "A 2.4GHz mixed-signal polar power amplifier with low-power integrated filtering in 65nm CMOS," in Custom Integrated Circuits Conference (CICC), 2010 IEEE, 2010, pp. 1 -4. [abstract]
• H. Fariborzi, M. Spencer, V. Karkare, J. Jeon, R. Nathanael, C. Wang, F. Chen, H. Kam, V. Pott, T. King Liu, E. Alon, V. Stojanovic, and D. Markovic, "Analysis and demonstration of MEM-relay power gating," in Custom Integrated Circuits Conference (CICC), 2010 IEEE, 2010, pp. 1 -4. [abstract]
• T. Ali, D. Patil, F. Liu, E. Alon, J. Lexau, C. K. Yang, and R. Ho, "Clocking Links in Multi-chip Packages: A Case Study," in High Performance Interconnects (HOTI), 2010 IEEE 18th Annual Symposium on, 2010, pp. 96 -103.
• M. Seeman, V. Ng, H. Le, M. John, E. Alon, and S. R. Sanders, "A Comparative Analysis of Switched-Capacitor and Inductor-Based DC-DC Conversion Technologies," in Control and Modeling for Power Electronics (COMPEL), 2010 IEEE 12th Workshop on, 2010, pp. 1 -7.
• S. Gambini, J. W. Crossley, E. Alon, and J. M. Rabaey, "A Fully Integrated, 300pJ/bit, Dual Mode 65nm CMOS Transceiver for cm-Range Wireless Links," in 2010 Symp. on VLSI Circuits Digest of Technical Papers, 2010.
• H. Le, M. Seeman, S. R. Sanders, V. Sathe, S. Naffziger, and E. Alon, "A 32nm Fully integrated Reconfigurable Switched-Capacitor DC-DC Converter Delivering 0.55W/mm^2 at 81% Efficiency," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 210 -211.
• F. Chen, M. Spencer, R. Nathanael, C. Wang, H. Fariborzi, A. Gupta, H. Kam, V. Pott, J. Jeon, T. King Liu, D. Markovic, V. Stojanovic, and E. Alon, "Demonstration of Integrated Micro-Electro-Mechanical Switch Circuits for VLSI Applications," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 150 -151.
• H. Kam, V. Pott, R. Nathanael, J. Jeon, E. Alon, and T. King Liu, "Design and reliability of a micro-relay technology for zero-standby-power digital logic applications," in Electron Devices Meeting (IEDM), 2009 IEEE International, 2009, pp. 1 -4.
• R. Ho, J. Lexau, F. Liu, D. Patil, R. Hopkins, E. Alon, N. Pinckney, P. Amberg, X. Zheng, J. Cunningham, and A. Krishnamoorthy, "Circuits for Silicon Photonics on a Macrochip," in Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian, 2009, pp. 17 -20.
• C. Marcu, D. Chowdhury, C. Thakkar, L. Kong, M. Tabesh, J. Park, Y. Wang, B. Afshar, A. Gupta, A. Arbabian, S. Gambini, R. Zamani, A. Niknejad, and E. Alon, "A 90nm CMOS Low-Power 60GHz Transceiver with Integrated Baseband Circuitry," in IEEE International Solid-State Circuits Conference, IEEE, 2009, pp. 314-315. [abstract]
• C. Marcu, D. Chowdhury, C. Thakkar, L. Kong, M. Tabesh, J. Park, Y. Wang, B. Afshar, A. Gupta, A. Arbabian, S. Gambini, R. Zamani, A. Niknejad, and E. Alon, "A 90nm CMOS Low-Power 60GHz Transceiver with Integrated Baseband Circuitry," in IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2009, pp. 314-315.
• H. Kam, T. King Liu, E. Alon, and M. Horowitz, "Circuit-Driven Requirements for CMOS-Replacement Devices," in IEEE International Electron Devices Meeting, 2008.
• F. Chen, H. Kam, D. Markovic, T. King Liu, V. Stojanovic, and E. Alon, "Integrated Circuit Design with NEM Relays," in IEEE/ACM International Conference on Computer-Aided Design, 2008.
• E. Alon and M. Horowitz, "Integrated Regulation for Energy-Efficient Digital Circuits," in Proc. 2007 IEEE Custom Integrated Circuits Conf. (CICC '07), Piscataway, NJ: IEEE Press, 2007, pp. 389-392.
• M. Horowitz, E. Alon, D. Patil, S. Naffziger, R. Kumar, and K. Bernstein, "Scaling, Power, and the Future of CMOS (Plenary Talk)," in 2005 IEEE Intl. Electron Devices Meeting (IEDM '05) Technical Digest, Piscataway, NJ: IEEE Press, 2005, pp. 7 pg.
• V. Abramzon, E. Alon, B. Nezamfar, and M. Horowitz, "Scalable Circuits for Supply Noise Measurement," in Proc. 31st European Solid-State Circuits Conf. (ESSCIRC 2005), L. Fesquet, A. Kaiser, S. Cristoloveanu, and M. Brillouet, Eds., Piscataway, NJ: IEEE Press, 2005, pp. 463-466.
• C. Werner, C. Hoyer, A. Ho, M. Jeeradit, F. Chen, B. Garlepp, W. Stonecypher, S. Li, A. Bansal, A. Agarwal, E. Alon, V. Stojanovic, and J. Zerbe, "Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system," in Proc. 2005 IEEE Custom Integrated Circuits Conf. (CICC '05), Piscataway, NJ: IEEE Press, 2005, pp. 709-716.
• K. Chang, S. Pamarti, K. Kaviani, E. Alon, X. Shi, T. J. Chin, J. Shen, G. Yip, C. Madden, R. Schmitt, C. Yuan, F. Assaderaghi, and M. Horowitz, "Clocking and Circuit Design for a Parallel I/O on a First-Generation CELL Processor," in 52nd IEEE Intl. Solid-State Circuits Conf. (ISSCC 2005) Digest of Technical Papers, L. C. Fujino, Ed., Vol. 48, Piscataway, NJ: IEEE Press, 2005, pp. 526-527, 615.
• E. Alon, V. Stojanovic, J. M. Kahn, S. Boyd, and M. Horowitz, "Equalization of Modal Dispersion in Multimode Fiber using Spatial Light Modulators," in Proc. 2004 IEEE Global Telecommunications Conf. (GLOBECOM '04), Vol. 2, Piscataway, NJ: IEEE Press, 2004, pp. 1023-1029.
• V. Stojanovic, A. Ho, B. Garlepp, F. Chen, J. Wei, E. Alon, C. Werner, J. Zerbe, and M. A. Horowitz, "Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver," in 2004 Symp. on VLSI Circuits Digest of Technical Papers, Gaithersburg, MD: Widerkehr and Associates, 2004, pp. 348-351.
• E. Alon, V. Stojanovic, and M. Horowitz, "Circuits and techniques for high-resolution measurement of on-chip power supply noise," in 2004 Symp. on VLSI Circuits Digest of Technical Papers, Gaithersburg, MD: Widerkehr and Associates, 2004, pp. 102-105.
• A. Ho, V. Stojanovic, F. Chen, C. Werner, G. Tsang, E. Alon, R. Kollipara, J. Zerbe, and M. A. Horowitz, "Common-mode backchannel signaling system for differential high-speed links," in 2004 Symp. on VLSI Circuits Digest of Technical Papers, Gaithersburg, MD: Widerkehr and Associates, 2004, pp. 352-355.
• K. Mai, R. Ho, E. Alon, D. Liu, Y. Kim, D. Patil, and M. Horowitz, "Architecture and circuit techniques for a reconfigurable memory block," in 2004 IEEE Intl. Solid-State Circuits Conf. (ISSCC '04) Digest of Technical Papers, Vol. 47, Piscataway, NJ: IEEE Press, 2004, pp. 10 pg.

Patents

• V. M. Stojanovic, A. C. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 7,423,454. Sep. 2008. [abstract]
• A. Ho, V. Stojanovic, F. F. Chen, E. Alon, and M. A. Horowitz, "Noise-tolerant signaling schemes supporting simplified timing and data recovery," U.S. Patent 7,292,637. Nov. 2007. [abstract]
• V. M. Stojanovic, A. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation," U.S. Patent 7,199,615. April 2007. [abstract]
• J. M. Kahn, M. A. Horowitz, E. Alon, and V. M. Stojanovic, "Adaptive control for mitigating interference in a multimode transmission medium," U.S. Patent 7,194,155. March 2007. [abstract]
• A. Amirkhany, V. M. Stojanovic, E. Alon, J. L. Zerbe, and M. A. Horowitz, "Linear transformation circuits," U.S. Patent Application. Nov. 2006.
• A. Amirkhany, V. Stojanovic, E. Alon, J. L. Zerbe, and M. A. Horowitz, "Linear transformation circuits," U.S. Patent 7,133,463. Nov. 2006. [abstract]
• V. M. Stojanovic, A. C. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 7,126,378. Oct. 2006. [abstract]
• E. Alon, B. W. Garlepp, V. Stojanovic, A. Ho, and F. F. Chen, "Circuit calibration system and method," U.S. Patent 7,126,510. Oct. 2006. [abstract]
• V. M. Stojanovic, A. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation," U.S. Patent 7,030,657. April 2006. [abstract]
• E. Alon, V. M. Stojanovic, and A. Amirkhany, "Digital transmitter with data stream transformation circuitry," U.S. Patent Application. Aug. 2005.
• E. Alon and S. Best, "Apparatus and method for a digital delay locked loop," U.S. Patent 6,919,749. July 2005. [abstract]
• E. Alon, S. Pamarti, F. Assaderaghi, and K. Chang, "Simultaneous bi-directional link," U.S. Patent Application. Dec. 2004.
• E. Alon, J. L. Burns, K. J. Nowka, and R. M. Rao, "Technique for mitigating gate leakage during a sleep state," U.S. Patent 6,791,361. Sep. 2004. [abstract]
• E. Alon and S. Best, "Apparatus and method for a digital delay locked loop," U.S. Patent 6,642,760. Nov. 2003. [abstract]

Ph.D. Theses

• C. Thakkar and E. Alon, "Design of Multi-Gb/s Multi-Coefficient Mixed-Signal Equalizers," 2012. [abstract]
• S. Gambini, J. M. Rabaey, and E. Alon, "Design of a system for cm-range wireless communication," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2009-184, Dec. 2009. [abstract]
• E. Alon, "Measurement and Regulation of On-Chip Power Supply Noise," Stanford University, Department of Electrical Engineering, Dec. 2006.

Masters Reports

• A. Gupta and E. Alon, "NEM Relay Memory Design," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2009-83, May 2009. [abstract]