UC Berkeley EECS Technical Reports

Fast and Accurate Digit Classification

2009-11-25T08:00:00Z

Fast and Accurate Digit Classification

Subhransu Maji and Jitendra Malik

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-159
November 25, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-159.pdf

We explore the use of certain image features, blockwise histograms of local orientations, used in many current object recognition algorithms, for the task of handwritten digit recognition. Existing approaches find that polynomial kernel SVMs trained on raw pixels achieve state of the art performance. However such kernel SVM approaches are impractical as they have a huge complexity at runtime. We demonstrate that with improved features a low complexity classifier, in particular an additive-kernel SVM, can achieve state of the art performance. Our approach achieves an error of $0.79%$ on the MNIST dataset and $3.4%$ error on the USPS dataset, while running at speeds comparable to the fastest algorithms on these datasets which are based on multilayer neural networks and are significantly faster and easier to train.

Nexus: A Common Substrate for Cluster Computing

2009-11-16T08:00:00Z

Nexus: A Common Substrate for Cluster Computing

Benjamin Hindman, Andrew Konwinski, Matei Zaharia, Ali Ghodsi, Anthony D. Joseph, Scott Shenker and Ion Stoica

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-158
November 16, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-158.pdf

The success of MapReduce has sparked the development of a diverse array of cluster computing frameworks. We believe that no single framework will be optimal for all applications, and that organizations will instead want to run multiple frameworks in the same cluster. Furthermore, to ease development of new frameworks, it is critical to identify common abstractions and modularize their architectures. To achieve these goals, we propose Nexus, a low-level substrate that provides isolation and efficient resource sharing across frameworks running on the same cluster, while giving each framework maximum control over the scheduling and execution of its jobs. Nexus fosters innovation in the cloud by letting organizations run new frameworks alongside existing ones and by letting framework developers focus on specific applications rather than building one-size-fits-all frameworks.

Dynamic Test Generation for Large Binary Programs

2009-11-12T08:00:00Z

Dynamic Test Generation for Large Binary Programs

David Alexander Molnar

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-157
November 12, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-157.pdf

This thesis develops new methods for addressing the problem of software security bugs, shows that these methods scale to large commodity software, and lays the foundation for a service that makes automatic, eﬀective security testing available at a modest cost per bug found. We make the following contributions:

We introduce a new search algorithm for systematic test generation that is optimized for large applications with large input ﬁles and exhibiting long execution traces where the search is bound to be incomplete (Chapter 2);

We introduce optimizations for checking multiple properties of a program simultaneously using dynamic test generation, and we formalize the notion of active property checking (Chapter 3);

We describe the implementation of tools that implement dynamic test generation of large binary programs for Windows and for Linux: SAGE and SmartFuzz. We explain the engineering choices behind their symbolic execution algorithm and the key optimization techniques enabling both tools to scale to program traces with hundreds of millions of instructions (Chapters 2 and 4);

We develop methods for coordinating large scale experiments with fuzz testing techniques, including methods to address the defect triage problem (Chapter 4);

Advisor: David Wagner

Implementing Memristor Based Chaotic Circuits

2009-11-08T08:00:00Z

Implementing Memristor Based Chaotic Circuits

Bharathwaj Muthuswamy

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-156
November 8, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-156.pdf

In this work, we synthesize a memristor and a chaotic circuit based on the memristor on a breadboard.

Transforming Community-based Healthcare with CommScape

2009-11-05T08:00:00Z

Transforming Community-based Healthcare with CommScape

Kuang Chen, Kurtis Heimerl, Tapan Parikh, Christine Robson and Beth Trushkowsky

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-155
November 5, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-155.pdf

Community HealthWorkers (CHWs) perform home visits for rural populations, provide basic healthcare, educate the population on disease prevention, refer patients to infacility treatment, and have the potential to capture vital data for predicting and preventing disease. These programs capture important information for research and monitoring, but face challenges in using the information to improve service delivery. We propose an information system for CHWs that not only captures but operationalizes data with a careful composition of technologies, including data visualization and delay tolerant networking. CommScape, an application for mobile phones, allows CHWs to capture, visualize and share key information like personal medical histories and trends and alerts. We posit that CommScape can improve CHWs’ quality of care, ability to predict and prevent diseases, and allow for better allocation of health resources.

Framework for Body Sensor Networks

2009-11-05T08:00:00Z

Framework for Body Sensor Networks

Sameer Iyengar

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-154
November 5, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-154.pdf

Advisor: Alberto Sangiovanni-Vincentelli

Exploring a Centralized/Distributed Hybrid Routing Protocol for Low Power Wireless Networks and Large Scale Datacenters

2009-11-04T08:00:00Z

Exploring a Centralized/Distributed Hybrid Routing Protocol for Low Power Wireless Networks and Large Scale Datacenters

Arsalan Tavakoli

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-153
November 4, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-153.pdf

Large scale networking has always embraced distributed solutions. Centralized systems elicit knee-jerk reactions, typically pointing to a single-point of failure, difficulty maintaining global state, and operational latency. Nonetheless, centralized solutions have gradually begun to make headway in mainstream networks, such as enterprise networks. In this work, we take this trend one step farther, exploring centralized solutions to two extreme networking environments: Lossy and Low-Power Wireless Networks, and Large-Scale Datacenters.

Low-Power Wireless Networks can be characterized as dynamic high-churn environments with low-bandwidth radios. We present HYDRO, a hybrid routing protocol for low-power wireless networks. At its core, HYDRO forms a directed acyclic graph (DAG) that is locally maintained to support many-to-one collection based routing. In addition, topology reports from individual nodes are gathered to create a "sufficient" global topology view, which subsequently allows for centrally installed state in the network to optimize point-to-point communication.

Within the datacenter context, we focus on the difficulties of incorporating middlebox traversal requirements into the existing architecture. We begin by presenting PLayer, a policy-aware switching layer for datacenters that enables network administrators to explicitly dictate the middlebox traversal sequence of classes of traffic in their network. Given PLayer's predominantly distributed nature, we subsequently present a centralized PLayer design, discussing its ability to handle the demanding scalability requirements of datacenters and provide a comparison of the two designs.

Advisor: Scott Shenker

Spline Knots and Their Control Polygons With Differing Knottedness

2009-11-01T07:00:00Z

Spline Knots and Their Control Polygons With Differing Knottedness

Carlo H. Séquin

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-152
November 1, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-152.pdf

Spline knots based on Bézier curves or B-splines can exhibit a knot type that is different from that exhibited by its control polygon, i.e., the spline and its control polygon are not ambient isotopic. By forming composite knots from suitably designed building blocks the difference in knottedness of the two 1-manifolds can be made arbitrarily large.

Finite State Machines and Modal Models in Ptolemy II

2009-11-01T07:00:00Z

Finite State Machines and Modal Models in Ptolemy II

Edward A. Lee

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-151
November 1, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-151.pdf

This report describes the usage and semantics of finite-state machines (FSMs) and modal models in Ptolemy II. FSMs are actors whose behavior is described using a finite set of states and transitions between the states. The transitions between the states are enabled by guards, which are boolean-valued expressions that can reference inputs to the actor and parameters in scope. The transitions can produce outputs and can update the value of parameters in scope. Modal models extend FSMs by allowing states to have refinements, which are hierarchical Ptolemy II models. The refinements may themselves be FSMs, modal models, or any composite actor containing a director compatible with the domain in which the modal model is being used. This report describes the operational semantics, the practical usage, and the semantics of time in modal models.

YAMR: Yet Another Multipath Routing Protocol

2009-10-30T07:00:00Z

YAMR: Yet Another Multipath Routing Protocol

Igor Anatolyevich Ganichev, Dai BIn, Philip Brighten Godfrey and Scott Shenker

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-150
October 30, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-150.pdf

As the Internet is now a critical component of our information infrastructure, several recent papers have proposed using multipath routing for increase the Internet’s reliability, and to give users greater control over the service they receive. However, the paths chosen by these protocols are not guaranteed to have high diversity. In this paper, we propose yet another multipath routing scheme (YAMR) for the interdomain case. YAMR provably constructs a set of paths that is resilient to any one inter-domain link failure, thus achieving high reliability in a systematic way. Further, even though YAMR maintains more paths that BGP, it actually requires significantly less control traffic, thus alleviating instead of worsening the Internet scalability. This reduction in churn is achieved by a novel hiding technique that automatically localize failures leaving the greater part of the Internet completely oblivious.

Fun with a Deadline Instruction

2009-10-30T07:00:00Z

Fun with a Deadline Instruction

Martin Schoeberl, Hiren D. Patel and Edward A. Lee

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-149
October 30, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-149.pdf

In this paper we present example applications using a deadline instruction. The deadline instruction brings cycle accurate timing information into the application code. We have implemented the mechanism in a time-predictable Java chip-multiprocessor. As a proof of the accuracy that can be gained, a digital to analog conversion of audio signals is implemented completely in software. Furthermore, we show how the deadline instruction can be used to verify bytecode execution times on chip-multiprocessors and how to synchronize tasks to a time-division based memory arbiter.

On Distributed Discrete Event Execution on Chip-Multiprocessors

2009-10-30T07:00:00Z

On Distributed Discrete Event Execution on Chip-Multiprocessors

Dai Bui, Hiren Patel and Edward A. Lee

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-148
October 30, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-148.pdf

Deploying real-time control systems software on multiprocessors requires distributing tasks on multiple processing elements, and coordinating their executions using a protocol. One potential protocol is the use of the discrete-event (DE) model of computation because it already defines a clear notion of the passage of time, and there is significant existing research on distributing DE. In this paper, we consider a distributed DE with null-message protocol (NMP) on a multicore system for real-time control systems. We illustrate that even with the null-message deadlock avoidance scheme in the protocol, the system may still deadlock due to inter-core message dependencies. We propose a simple analytical model to identify two central reasons for these deadlocks. They are lack of an upper bound on send and receive rates for each processing element, and an unknown upper-bound on network delay. Then, we argue that architecture features such as timing control, timing synchronization and real-time networks-on-chip can be used to prevent message-dependent deadlock. We show that we can replace NMP with a distributed DE strategy called PTIDES that helps ease the process of eliminating this deadlock problem.

Convex Channel Design for Improved Capacitorless DRAM Retention Time

2009-10-28T07:00:00Z

Convex Channel Design for Improved Capacitorless DRAM Retention Time

Min Hee Cho, Changhwan Shin and Tsu-Jae King Liu

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-147
October 28, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-147.pdf

A convex channel surface with Si0.8Ge0.2 is proposed to enhance the retention time of a Z-RAM Generation 2 type of capacitorless DRAM cell. This structure provides a physical well together with an electrostatic barrier to more effectively store holes and thereby achieve larger sensing margin as well as retention time. The advantages of this new cell design as compared with the planar cell design are assessed via two-dimensional device simulations. The results indicate that the convex heterojunction channel design is very promising for future capacitorless DRAM.

Internet Enabled Personal Choice - The Culmination of Domesticated Information and Communication Technologies

2009-10-27T07:00:00Z

Internet Enabled Personal Choice - The Culmination of Domesticated Information and Communication Technologies

Yanpei Chen and Xinrong Zhang

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-146
October 27, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-146.pdf

This report seeks to extend and apply the conceptual framework about the domestication of information and communication technologies. The domestication framework understands the adoption of technologies as a feedback process that converts technology artifacts from cold, lifeless tools to comfortable and useful consumer goods. This framework has been successful in helping us understand the adoption of past information and communication technologies, represented by physical and shared household appliances. We will illustrate how changing technology and business trends have posed challenges to the existing domestication framework and require a change in focus. At the same time, key aspects of the domestication framework remain helpful in understanding the adoption or rejection of technologies. We will extend the domestication framework to allow it to transcend the changing nature of technologies and consumers. We will then demonstrate the value of the extended framework by using it to project future technology-consumer trends and to identify innovation opportunities. The key result from our analysis is that the predominant technology-consumer relationship in the foreseeable future would involve Internet and other multi-directional networked technologies interacting with individual consumers. This interaction enables an ecosystem of technologies and allows consumers to directly participate in technology creation. Domesticated technologies would become more than just meaningful; they also become a part of who we are.

Privacy Scope: A Precise Information Flow Tracking System For Finding Application Leaks

2009-10-27T07:00:00Z

Privacy Scope: A Precise Information Flow Tracking System For Finding Application Leaks

Yu Zhu, Jaeyeon Jung, Dawn Song, Tadayoshi Kohno and David Wetherall

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-145
October 27, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-145.pdf

We present Privacy Scope, a new system that tracks the movement of sensitive user data as it flows through off-the-shelf applications. Privacy Scope uses application-level dynamic taint analysis, implemented with dynamic binary translation tools, to let users run applications in their own environment while pinpointing information leaks, even when the sensitive data is encrypted. The system is made possible by techniques we developed for accurate and efficient tainting. Semantic-aware instruction-level tainting handles special cases and is critical to avoid taint explosion or loss. Function summaries provide an interface to handle taint propagation within the kernel and reduce the overhead of instruction-level tracking. On-demand instrumentation enables fast loading of large applications.

Together, these techniques let us run on large, multi-threaded, networked applications and precisely track where information goes. In tests on Internet Explorer, Yahoo! Messenger, and Windows Notepad, Privacy Scope generated no false positives and instrumented fewer than 5% of the executed instructions.