Sanjit A. Seshia

Assistant Professor

Research Areas

• Design of Electronic Systems (DES)
• Programming Systems (PS)
• Security (SEC)
• Dependable Computing; Computational Logic; Formal Methods

Research Centers

• Center for Hybrid and Embedded Software Systems (CHESS)
• Donald O. Pederson Center for Electronics Systems Design (DOP)
• Gigascale Systems Research Center (GSRC)
• Team for Research in Ubiquitous Secure Technology (TRUST)

Teaching Schedule (Spring 2008)

• CS 172. Computers and Complexity, T T 11:00-12:30P, 405 Soda
• EE 124. Introduction to Embedded Systems, MW 9-1030A, 293 Cory

Biography

He received his B.Tech. in Computer Science and Engineering from the Indian Institute of Technology, Bombay and a M.S. and a Ph.D. in Computer Science from Carnegie Mellon University. He has received a Sloan Research Fellowship (2008), an NSF CAREER award (2007) and the 2005 School of Computer Science Distinguished Dissertation Award at Carnegie Mellon University.

Selected Publications

• S. K. Jha, B. Brady, and S. A. Seshia, "Symbolic Reachability Analysis of Lazy Linear Hybrid Automata," in Formal Modeling and Analysis of Timed Systems (FORMATS), Vol. 4763, Springer, 2007.
• S. A. Seshia, "Autonomic Reactive Systems via Online Learning," in Proc. International Conference on Autonomic Computing, 2007.
• A. Solar Lezama, G. Arnold, L. Tancau, R. Bodik, V. Saraswat, and S. A. Seshia, "Sketching stencils," in Proc. 2007 ACM SIGPLAN Conf. on Programming Language Design and Implementation (PLDI '07), New York, NY: The Association for Computing Machinery, Inc., 2007, pp. 167-178.
• S. A. Seshia, W. Li, and S. Mitra, "Verification-Guided Soft Error Resilience," in Proc. Design Automation and Test in Europe (DATE), 2007, pp. 1442-1447.
• R. E. Bryant, D. Kroening, J. Ouaknine, S. A. Seshia, O. Strichman, and B. Brady, "Deciding Bit-Vector Arithmetic with Abstraction," in 13th Intl. Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), 2007, pp. 358--372.
• S. A. Seshia and R. E. Bryant, "Deciding quantifier-free Presburger formulas using parameterized solution bounds," Logical Methods in Computer Science, vol. 1, no. 2, Dec. 2005.
• V. Ganapathy, S. A. Seshia, S. Jha, T. W. Reps, and R. E. Bryant, "Automatic discovery of API-level exploits," in Proc. 27th Intl. Conf. on Software Engineering, New York, NY: ACM Press, 2005, pp. 312-321.
• S. A. Seshia and R. E. Bryant, "Modeling and verifying circuits using generalized relative timing," in Proc. 11th IEEE Intl. Symp. on Asynchronous Circuits and Systems, Los Alamitos, CA: IEEE Computer Society, 2005, pp. 98-108.
• S. A. Seshia, S. K. Lahiri, and R. E. Bryant, "A hybrid SAT-based decision procedure for separation logic with uninterpreted functions," in Proc. 40th Design Automation Conference, New York, NY: ACM Press, 2004, pp. 425-430.
• R. E. Bryant, S. K. Lahiri, and S. A. Seshia, "Modeling and verifying systems using a logic of counter arithmetic with lambda expressions and uninterpreted functions," in Computer Aided Verification, E. Brinksma and K. G. Larsen, Eds., Vol. 2404, Berlin: Springer-Verlag, 2002, pp. 78-92.