Sayeef Salahuddin

Assistant Professor

Research Areas

• Design, Modeling and Analysis (DMA)
• Energy (ENE)
• Physical Electronics (PHY)
• Scientific Computing (SCI)

Research Centers

• Center for Energy Efficient Electronics Science (E3S)

Teaching Schedule (Spring 2013)

• EE 105. Microelectronic Devices and Circuits, MWF 1:00-2:00P, 106 Stanley

Biography

Sayeef Salahuddin received his B.Sc. in Electrical and Electronic Engineering from BUET (Bangladesh University of Engineering and Technology) in 2003 and PhD in Electrical and Computer Engineering from Purdue University in 2007. He joined the faculty of Electrical Engineering and Computer Science at University of California, Berkeley in 2008. His research interests are in the interdisciplinary field of electronic transport in nano structures currently focusing on novel electronic and spintronic devices for low power logic and memory applications. Salahuddin has championed the concept of using 'interacting systems' for switching, showing fundamental advantage of such systems over the conventional devices in terms of power dissipation. He received the Kintarul Haque Gold Medal from BUET in 2003, the Meissner fellowship from Purdue University, 2003-4, an IBM PhD Fellowship 2007-8, a MARCO/FCRP Inventor Recognition Award in 2007, a UC Regents Junior Faculty Fellowship in 2009, a Hellman Faculty Fellowship in 2010, a DOE NISE award in 2010, the NSF CAREER award in 2011, the IEEE Nanotechnology Early Career Award in 2012 and AFOSR Young Investigator Award in 2013.

Selected Publications

• S. Salahuddin, "Solid-state physics: A new spin on spintronics," Nature, vol. 494, no. 7435, pp. 43--44, 2013.
• Y. Yoon, K. Ganapathi, and S. Salahuddin, "How Good Can Monolayer MoS2 Transistors Be?," Nano Letters, vol. 11, no. 9, pp. 3768-3773, 2011.
• Y. Yoon, D. E. Nikonov, and S. Salahuddin, "Role of phonon scattering in graphene nanoribbon transistors: Nonequilibrium Green's function method with real space approach," Applied Physics Letters, vol. 98, no. 20, pp. 203503, 2011.
• J. T. Heron, M. Trassin, K. Ashraf, M. Gajek, Q. He, S. Y. Yang, D. E. Nikonov, Y. Chu, S. Salahuddin, and R. Ramesh, "Electric-Field-Induced Magnetization Reversal in a Ferromagnet-Multiferroic Heterostructure," Phys. Rev. Lett., vol. 107, pp. 217202, Nov. 2011.
• A. I. Khan, D. Bhowmik, P. Yu, S. J. Kim, X. Pan, R. Ramesh, and S. Salahuddin, "Experimental evidence of ferroelectric negative capacitance in nanoscale heterostructures (Cover Story)," Applied Physics Letters, vol. 99, no. 11, pp. 113501, Sep. 2011.
• K. Ganapathi and S. Salahuddin, "Heterojunction Vertical Band-to-Band Tunneling Transistors for Steep Subthreshold Swing and High on Current," Electron Device Letters, IEEE, vol. 32, no. 5, pp. 689 -691, May 2011.
• H. Ko, K. Takei, R. Kapadia, S. Chuang, H. Fang, P. W. Leu, K. Ganapathi, E. Plis, H. S. Kim, S. Chen, M. Madsen, A. C. Ford, Y. Chueh, S. Krishna, S. Salahuddin, and A. Javey, "Ultrathin compound semiconductor on insulator layers for high-performance nanoscale transistors," Nature, vol. 468, no. 7321, pp. 286-289, Nov. 2010.
• Y. Yoon and S. Salahuddin, "Barrier-free tunneling in a carbon heterojunction transistor (Cover Story)," Applied Physics Letters, vol. 97, no. 3, pp. 033102, July 2010.
• B. Behin-Aein, D. Datta, S. Salahuddin, and S. Datta, "Proposal for an all-spin logic device with built-in memory," Nature Nanotechnology, vol. 5, no. 4, pp. 266--270, Feb. 2010.
• S. Salahuddin and S. Datta, "Use of negative capacitance to provide voltage amplification for low power nanoscale devices (Issue Cover Story)," Nanoletters, vol. 8, no. 2, pp. 405-410, Feb. 2008.