David A. Patterson
Professor Emeritus, Professor in the Graduate School
David Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1977.
Dave's research style is to identify critical questions for the IT industry and gather inter-disciplinary groups of faculty and graduate students to answer them. The answer is typically embodied in demonstration systems, and these demonstration systems are later mirrored in commercial products. In addition to research impact, these projects train leaders of our field. The best known projects were Reduced Instruction Set Computers (RISC), Redundant Array of Inexpensive Disks (RAID), and Networks of Workstations (NOW), each of which helped lead to billion dollar industries.
A measure of the success of projects is the list of awards won by Patterson and as his teammates: the C & C Prize, the IEEE von Neumann Medal, the IEEE Johnson Storage Award, the SIGMOD Test of Time award, the ACM-IEEE Eckert-Mauchly Award, and the Katayanagi Prize. He was also elected to both AAAS societies, the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and to be a Fellow of the Computer History Museum. The full list includes about 35 awards for research, teaching, and service.
In his spare time he coauthored six books, including two with John Hennessy, who is President of Stanford University. Patterson also served as Chair of the Computer Science Division at UC Berkeley, Chair of the Computing Research Association, and President of ACM.
- A. Rabkin, C. Reiss, R. H. Katz, and D. A. Patterson, "Experiences teaching MapReduce in the Cloud," in SIGCSE '12 Proceedings of the 43rd ACM technical symposium on Computer Science Education, ACM, 2012, pp. 601-606.
- M. Zaharia, W. J. Bolosky, K. Curtis, A. Fox, D. A. Patterson, S. Shenker, I. Stoica, R. M. Karp, and T. Sittler, "Faster and More Accurate Sequence Alignment with SNAP," CoRR, vol. abs/1111.5572, 2011.
- J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 5th ed., Computer Architecture and Design, Morgan Kaufmann Publishers, 2011.
- H. Cook, E. Gonina, S. Kamil, G. Friedland, D. A. Patterson, and A. Fox, "CUDA-level performance with python-level productivity for Gaussian mixture model applications," in Proceedings of the 3rd USENIX conference on Hot topic in parallelism, HotPar'11, USENIX Association, 2011, pp. 7-7.
- K. Asanović, R. Bodik, J. Demmel, T. Keaveny, K. Keutzer, N. Morgan, D. A. Patterson, K. Sen, J. Wawrzynek, D. Wessel, and K. A. Yelick, "A View of the Parallel Computing Landscape," Communications of the ACM, vol. 52, no. 10, pp. 56-67, Oct. 2009.
- T. E. Anderson, D. E. Culler, and D. A. Patterson, "A case for NOW (Networks of Workstations)," IEEE Micro, vol. 15, no. 1, pp. 54-64, Feb. 1995.
- D. E. Culler, R. M. Karp, D. A. Patterson, A. Sahay, K. E. Schauser, E. E. Santos, R. Subramonian, and T. von Eicken, "LogP: Towards a realistic model of parallel computation," in Proc. 4th ACM SIGPLAN Symp. on Principles and Practice of Parallel Programming, New York, NY: ACM Press, 1993, pp. 1-12.
- M. Stonebraker, R. H. Katz, D. A. Patterson, and J. Ousterhout, "The design of XPRS," in Proc. 14th Intl. Conf. on Very Large Data Bases, F. Bancilhon and D. J. DeWitt, Eds., San Francisco, CA: Morgan Kaufmann Publishers Inc., 1988, pp. 318-330.
- D. A. Patterson, G. Gibson, and R. H. Katz, "A case for Redundant Arrays of Inexpensive Disks (RAID) (ACM SIGMOD 1998 Test of Time Award)," in Proc. 1988 ACM SIGMOD Intl. Conf. on Management of Data (SIGMOD '88), H. Boral and P. Larson, Eds., New York, NY: The Association for Computing Machinery, Inc., 1988, pp. 109-116.
- D. A. Patterson and C. H. Séquin, "RISC I: A Reduced Instruction Set VLSI Computer," in Proc. 8th Intl. Symp. on Computer Architecture, Los Alamitos, CA: IEEE Computer Society Press, 1981, pp. 443-457.
- D. A. Patterson and D. R. Ditzel, "The case for the Reduced Instruction Set Computer," ACM SIGARCH Computer Architecture News, vol. 8, no. 6, pp. 25-33, Oct. 1980.