Borivoje Nikolic

Associate Professor

Research Areas

• Communications & Networking (COMNET)
• Computer Architecture & Engineering (ARC)
• Design of Electronic Systems (DES)
• Integrated Circuits (INC)

Research Centers

• Berkeley Wireless Research Center (BWRC)

Teaching Schedule (Spring 2008)

• EE 241. Advanced Digital Integrated Circuits, TuTh 330-5P, 293 Cory

Biography

Prof. Nikolic received the Dipl. Ing. and M.Sc. in Electrical Engineering from the University of Belgrade, Yugoslavia, in 1992 and 1994, respectively, and the Ph.D. degree in Electrical and Computer Engineering from the University of California, Davis, in 1999. He joined the EECS faculty at U.C. Berkeley in 1999. His research interests include digital integrated circuits and VLSI implementation of communications and signal processing systems.

He is the author or co-author of over 100 journal articles and conference presentations, two of which have been singled out for distinction: "A 1.8V 14b 10MS/s pipelined ADC in 0.18μm CMOS with 99dB SFDR" (with Y. Chiu and P. R. Gray), which received the 2004 Jack Kilby Award for Outstanding Student Paper presented at the IEEE International Solid-State Circuits Conference; and "FinFET-based SRAM design" (with Z. Guo, S. Balasubramanian, R. Zlatanovici, and T.-J. King), which received the Best Paper Award at the 2005 International Symposium on Low Power Electronics and Design. In 2003 he co-authored the book, Digital Integrated Circuits: A Design Perspective (2nd ed.), with Jan M. Rabaey and Anantha P. Chandrakasan. He is also author or co-author of five patents.

Prof. Nikolic is a member of the IEEE.

Selected Publications

• J. M. Rabaey, F. De Bernardinis, A. Niknejad, and B. Nikolic, "Embedding mixed-signal design in systems-on-chip," Proceedings of the IEEE, vol. 94, pp. 1070-1088, June 2006.
• Y. Chiu, P. R. Gray, and B. Nikolic, "A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR," IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2139-2151, Dec. 2004.
• D. Markovic, V. Stojanovic, B. Nikolic, M. A. Horowitz, and R. W. Brodersen, "Methods for true energy-performance optimization," IEEE J. Solid-State Circuits, vol. 39, no. 8, pp. 1282-1293, Aug. 2004.
• Y. Shimazaki, R. Zlatanovici, and B. Nikolic, "A shared-well dual-supply-voltage 64-bit ALU," IEEE J. Solid-State Circuits, vol. 39, no. 3, pp. 494-500, March 2004.
• J. M. Rabaey, A. P. Chandrakasan, and B. Nikolic, Digital Integrated Circuits: A Design Perspective, 2nd ed., Prentice Hall Electronics and VLSI Series, Upper Saddle River, NJ: Pearson Education, 2003.
• E. Yeo, B. Nikolic, and V. Anantharam, "Iterative decoder architectures," IEEE Communications Magazine, vol. 41, no. 8, pp. 132-140, Aug. 2003.
• J. M. Rabaey, A. P. Chandrakasan, and B. Nikolic, Digital Integrated Circuits: A Design Perspective, 2 ed., Prentice Hall Electronics and VLSI Series, Upper Saddle River, NJ: Prentice Hall/Pearson Education, 2003.