Paul R. Gray
Professor Emeritus, Executive Vice Chancellor and Provost Emeritus
Paul R. Gray received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from the University of Arizona, Tucson, in 1963, 1965, and 1969, respectively. In 1969 he joined the Research and Development Laboratory at Fairchild Semiconductor in Palo Alto, California. While there, he was involved in the application of new technologies for analog integrated circuits, including power integrated circuits and data conversion circuits. In 1971, he joined the faculty of the Department of Electrical Engineering and Computer Sciences at U.C. Berkeley, where he is now a Professor Emeritus and Professor in the Graduate School. His research interests have included bipolar and MOS circuit design, electro-thermal interactions in integrated circuits, device modeling, telecommunications circuits, and analog-digital interfaces in VLSI systems.
Prof. Gray is the author or co-author of over 150 journal articles and conference presentations, for which he has been the co-recipient of a number of best paper awards. He has published four books, one of which is his co-authored text, Analysis and Design of Analog Integrated Circuits, originally published in 1977 and followed by additional editions in 1984, 1993, and 2001. He is also author or co-author of 14 patents.
Prof. Gray is a member of the National Academy of Engineering, a Fellow of the IEEE, and a recipient of several technical achievement and education awards, including the IEEE Centennial Medal (1984), the Circuits and Systems Society Technical Achievement Award (1987), the IEEE Solid-State Circuits Award (1994), the National Outstanding Researcher Award from the Semiconductor Industry Association (2000), the IEEE James H. Mulligan, Jr. Education Medal (2004), the ASEE Benjamin Garver Lamme Award (2005), and the IEEE Robert Noyce Medal (2008). Prof. Gray has also been awarded honorary doctorates from the University of Bucharest in Romania (1999) and from the Swiss Federal Institute of Technology in Lausanne, Switzerland (2006).
Prof. Gray has held several administrative posts at Berkeley, including Chairman of the Department of Electrical Engineering and Computer Sciences (1990-93), Dean of the College of Engineering (1996-2000), and Executive Vice Chancellor and Provost (2000-2006). He currently serves as a Councilor of the National Academy of Engineering, a member of the National Research Council Governing Board, a member of the board of trustees of the Gordon and Betty Moore Foundation, and as a member of several corporate boards.
- P. R. Gray, P. Hurst, S. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed., New York, NY: Wiley, 2001.
- J. C. Rudell, J. Ou, T. B. Cho, G. Chien, F. Brianti, J. A. Weldon, and P. R. Gray, "A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications," IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 2071-2088, Dec. 1997.
- T. B. Cho and P. R. Gray, "A 10-bit, 20-MS/s, 35-mW pipeline A/D converter," in Proc. 1994 EEE Custom Integrated Circuits Conf., New York, NY: IEEE, 1994, pp. 499-502.
- R. W. Brodersen, P. R. Gray, and D. A. Hodges, "MOS switched-capacitor filters," Proc. IEEE, vol. 67, no. 1, pp. 61-75, Jan. 1979.
- G. Jacobs, D. Allstot, R. W. Brodersen, and P. R. Gray, "Design techniques for MOS switched capacitor ladder filters (W. R. G. Baker Prize Paper Award)," IEEE Trans. Circuits and Systems, vol. 25, no. 12, pp. 1014-1021, Dec. 1978.
- D. A. Hodges, P. R. Gray, and R. W. Brodersen, "Potential of MOS technologies for analog integrated circuits," IEEE J. Solid-State Circuits, vol. SC-13, no. 3, pp. 285-294, June 1978.
- D. J. Allstot, R. W. Brodersen, and P. R. Gray, "Fully-integrated high-order NMOS sampled-data ladder filters," in Digest of Technical Papers, 1978 IEEE Intl. Solid-State Circuits Conf., Vol. 21, New York, NY: IEEE, 1978, pp. 82-83.
- J. L. McCreary and P. R. Gray, "All-MOS charge redistribution analog-to-digital conversion techniques. I.," IEEE J. Solid-State Circuits, vol. SC-10, no. 6, pp. 371-379, Dec. 1975.
- R. E. Suarez, P. R. Gray, and D. A. Hodges, "All-MOS charge-redistribution analog-to-digital conversion techniques. II.," IEEE J. Solid-State Circuits, vol. SC-10, no. 6, pp. 379-385, Dec. 1975.
- R. E. Suarez, P. R. Gray, and D. A. Hodges, "An all-MOS charge-redistribution A/D conversion technique," in 1974 IEEE Intl. Solid-State Circuits Conf. Digest of Technical Papers, Vol. 17, New York, NY: IEEE, 1974, pp. 194-195.