Joint Colloquium Distinguished Lecture Series
Racetrack Memory: A high-performance, storage class memory using magnetic domain-walls manipulated by current
Wednesday, March 7, 2012
Racetrack Memory is a novel high-performance, non-volatile storage-class memory in which magnetic domains are used to store information in a “magnetic racetrack” . The magnetic racetrack promises a solid state memory with storage capacities and cost rivaling that of magnetic disk drives but with much improved performance and reliability: a “hard disk on a chip”. The magnetic racetrack is comprised of a magnetic nanowire in which a series of magnetic domain walls are shifted to and fro along the wire using nanosecond-long pulses of spin polarized current . We have demonstrated the underlying physics that makes Racetrack Memory possible [3,4] and all the basic functions - creation, and manipulation of a train of domain walls and their detection. The physics underlying the current induced dynamics of domain walls will also be discussed. In particular, we show that the domain walls respond as if they have mass, leading to significant inertial driven motion of the domain walls over long times after the current pulses are switched off . We also demonstrate that in perpendicularly magnetized nanowires there are two independent current driving mechanisms: one derived from bulk spin-dependent scattering that drives the domain walls in the direction of electron flow, and a second interfacial mechanism that can drive the domain walls either along or against the electron flow, depending on subtle changes in the nanowire structure. Finally, we demonstrate thermally induced spin currents are large enough that they can be used to manipulate domain walls.
 S.S.P. Parkin, US Patent 6,834,005 (2004); S.S.P. Parkin et al., Science 320, 190 (2008); S.S.P. Parkin, Scientific American (June 2009).
 M. Hayashi, L. Thomas, R. Moriya, C. Rettner and S.S.P. Parkin, Science 320, 209 (2008).
 L. Thomas et al., Science 330, 1810 (2010).
 X. Jiang et al. Nat. Comm. 1:25 (2010) and Nano Lett. 11, 96 (2011).
Stuart Parkin is an IBM Fellow and Manager of the Magnetoelectronics group at the IBM Research - Almaden, San Jose, California and a consulting professor in the Department of Applied Physics at Stanford University. He is also director of the IBM-Stanford Spintronic Science and Applications Center, which was formed in 2004. He received his BA and PhD degrees from the University of Cambridge and joined IBM as a postdoctoral fellow in 1982, becoming a permanent member of the staff the following year. In 1999 he was named an IBM Fellow, IBM's highest technical honor. Parkin's research interests have included organic superconductors, high-temperature superconductors, and, most recently, magnetic thin film structures and spintronic materials and devices for advanced sensor, memory, and logic applications. He is a Fellow of the Royal Society, the American Physical Society, the Institute of Physics (London), the Institute of Electrical and Electronics Engineers, and the American Association for the Advancement of Science. Parkin is the recipient of numerous honors, including a Humboldt Research Award (2004), the 1999-2000 American Institute of Physics Prize for Industrial Applications of Physics, the European Physical Society's Hewlett- Packard Europhysics Prize (1997), the American Physical Society's International New Materials Prize (1994), the MRS Outstanding Young Investigator Award (1991) and the Charles Vernon Boys Prize from the Institute of Physics, London (1991). In 2001, he was named R&D Magazine's first Innovator of the Year. Parkin has authored ~350 papers and has ~54 issued patents.
Parkin is a pioneer in the science and application of spintronic materials. His discovery of oscillatory interlayer coupling in magnetic multilayers and giant magnetoresistance in sputter deposited magnetic metallic heterostructures in 1989 led to IBM's development of the spin-valve read head, which enabled a more than 100-fold increase in the magnetic hard-disk-drive data-density since 1998. Dr. Parkin also proposed using magnetic tunneling junction storage elements to create a high performance magnetic random access memory in 1995. MRAM memory promises unique attributes of high speed, high density and non-volatility. The development by Dr. Parkin in 2001 of giant tunneling magnetoresistance in magnetic tunnel junctions using highly textured MgO tunnel barriers has made MRAM even more promising. IBM developed the first MRAM prototype in 1999 and is currently developing a 16 Mbit chip. Parkin is currently researching new structures for use as spin transistors and spin-logic devices that may enable a new generation of low-power electronics.
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