Joint Colloquium Distinguished Lecture Series
History and Future of the FinFET
Wednesday, October 12, 2011
Tsu-Jae King Liu
In 1996 the semiconductor industry was ramping up production of 0.25 mm CMOS integrated circuits, and the end of transistor scaling was in sight. DARPA issued a call for proposals for research on 25 nm silicon transistors suitable for tera-scale integrated circuits. A team of researchers at UC Berkeley responded to this call, and by the end of 1998 demonstrated multiple pathways for transistor scaling to 25 nm and beyond. The most prominent of these was the FinFET, an advanced transistor design of which Intel’s “3-D transistor” (announced in May 2011 and slated for 22 nm CMOS production by early 2012) is a variant. After setting the stage for this story, this talk will take the audience on a journey back through the development of the FinFET by UC Berkeley and its adoption by the industry, and offer a perspective on continued transistor scaling well into the future.
Tsu-Jae King Liu received the B.S., M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 1984, 1986 and 1994, respectively. She joined the Xerox Palo Alto Research Center as a Member of Research Staff in 1992, to research and develop polycrystalline-silicon thin-film transistor technologies for high-performance flat-panel display and imaging applications. During her tenure with Xerox PARC, she served as a Consulting Assistant Professor of Electrical Engineering at Stanford University. In August 1996 she joined the faculty of the University of California, at Berkeley, where she is now the Conexant Systems Distinguished Professor of Electrical Engineering and Computer Sciences (EECS) and Associate Dean for Research in the College of Engineering. From 2000 to 2004 and from 2006 to 2008, she served as the Faculty Director of the UC Berkeley Microfabrication Laboratory. From 2003 to 2004, she also served as Vice Chair for Graduate Matters in the EECS Department. From July 2004 through June 2006 she was Senior Director of Engineering in the Advanced Technology Group of Synopsys, Inc. (Mountain View, CA).
Dr. Liu's awards include the Ross M. Tucker AIME Electronics Materials Award (1992) for seminal work in polycrystalline silicon-germanium thin films, an NSF CAREER Award (1998) for research in thin-film transistor technology, the DARPA Significant Technical Achievement Award (2000) for development of the FinFET, the Electrical Engineering Award for Outstanding Teaching at UC Berkeley (2003), the IEEE Kiyo Tomiyasu Award (2010) for contributions to nanoscale MOS transistors, memory devices, and MEMS devices, and the Electrochemical Society Dielectric Science and Technology Division Thomas D. Callinan Award (2011) for excellence in dielectrics and insulation investigations. Her research activities are presently in nanometer-scale logic and memory devices, and advanced materials, process technology, and devices for energy-efficient electronics. She has authored or co-authored close to 400 publications and holds over 80 patents.
Dr. Liu is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) and a past member of The Electrochemical Society (ECS), the Society for Information Display (SID), and the Materials Research Society (MRS).
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