EECS Joint Colloquium Distinguished Lecture Series

Wednesday, November 05, 2003
Hewlett Packard Auditorium, 306 Soda Hall
4:00-5:00 p.m.

Professor Mark Horowitz

Electrical Engineering and Computer Sciences Dept.,
Stanford University


CMOS, Scaling, and the Future




Technology scaling has driven integrated circuit designers for the past four decades, both enabling them to create ever more complex electronic systems, but also forcing them to change the way that they think about design. This talk is a mostly serious look at the factors driving designers today, looking at design issues that future designers will need to face.

Although technology scaling is a predictable/smooth process, designer's response is not smooth, and often has step like changes when new tools or techniques are introduced. Some of the most dramatic design changes occur when the basic circuit technology changes, but other design changes can be as large, like the introduction of HDL and synthesis. We are currently facing a number of issues which might lead to large changes in design. The most critical is power. Previous shifts in circuit style, from bipolar (TTL and ECL, if you are old enough to remember) to nMOS, and then from nMOS to the CMOS style we have been using for roughly the past 20 years were partially driven by power issues. Yet today's CMOS chips dissipate more power than even the old bipolar chips did, and the scaling trends are not promising. The looming power constraints will force us to worry about performance efficiency and not performance, since in the future the peak performance solution will always dissipate too much power.


Mark Horowitz is the Yahoo Founder's Professor of Electrical Engineering and Computer Science at Stanford University. He received his BS and MS in Electrical Engineering from MIT in 1978, and his PhD from Stanford in 1984. Dr. Horowitz is the recipient of a 1985 Presidential Young Investigator Award, and an IBM Faculty development award, as well as the 1993 best paper award at the International Solid State Circuits Conference.

Dr Horowitz's research area is in digital system design, and he has led a number of processor designs including MIPS-X, one of the first processors to include an on-chip instruction cache, TORCH, a statically-scheduled, superscalar processor that supported speculative execution, and FLASH, a flexible DSM machine. He has also worked in a number of other chip design areas including high-speed and low-power memory design, high-bandwidth interfaces, and fast floating point. In 1990 he took leave from Stanford to help start Rambus Inc, a company designing high-bandwidth chip interface technology. His current research includes multiprocessor design, low power circuits, memory design, and high-speed links.