CURRENT Ph.D. STUDENTS

NAME RESEARCH AREA graduating
FUNDING SOURCE
Min Hee Cho
Novel IC devices and technology
~2012
Samsung Electronics Co., Ltd.
Pankaj Kalra Advanced source/drain processes for nanoscale CMOS technology
Spring 2008
SEMATECH
Hei Kam NEM relays for ultra-low-power ICs 2009
MARCO C2S2
Joanna Lai Low-thermal-budget IC technologies
Summer 2008
MARCO MSD Center
Donovan Lee NEMS devices and technology Spring 2009
Center of Integrated Nanomechanical Systems,
Center on Interfacial Engineering for Microelectromechanical Systems
Blake C. Lin Integrated MEMS technology for adaptive optics Summer 2008
NSF Center for Adaptive Optics
Peter Matheu
Tunnel FETs for extremely-low-power electronics
~2012
DARPA MTO
Rhesa Nathanael
Advanced IC devices and technology
~2011
MARCO C2S2
Changhwan Shin
Device and circuit designs for robust SRAM
~2011
Korea Foundation for Advanced Studies (KFAS)
Xin Sun
FET design and process technology for reduced variability
~2009
Semiconductor Research Corporation
Reinaldo Vega
Advanced source/drain FET design and process technology
~2010
Semiconductor Research Corporation, MARCO MSD Center

FORMER Ph.D. STUDENTS

NAME
PhD THESIS
graduated
EMPLOYER
Sriram Balasubramanian
Nanoscale Thin-Body MOSFETs: Technology and Applications
2006
Advanced Micro Devices (Sunnyvale, CA)
Andrew Carlson
Device and Circuit Techniques for Reducing Variation in Nanoscale SRAM
2008
Advanced Micro Devices (Boston, MA)
Marie-Ange Eyoum
Modularly Integrated MEMS Technology
2006
Intel Corporation (Santa Clara, CA)
Andrea E. Franke Polycrystalline Silicon-Germanium Films for Integrated Microsystems
2000
(deceased)
Daniel Good
Novel Processes for Poly-Si Thin-Film Transistors on Plastic Substrates
2007
(self-employed consultant)
Xuejue Huang
Modeling and Design Optimization of Multi-GHz IC Interconnects
2002
Intel Corporation (Phoenix, AZ)
Qing Ji
Maskless, Resistless Ion Beam Lithography Processes
2003
Lawrence Berkeley National Laboratory (Berkeley, CA)
Alvaro Padilla
Advanced Transistor Structures and Charge Detection Methods for Flash Memory
2007
University of California at Berkeley
Pushkar Ranade
Advanced Gate Materials and Processes for Sub-70nm CMOS Technology
2002
Intel Corporation (Hillsboro, OR)
Min She
Semiconductor Flash Memory Scaling
2003
Sandisk (Milpitas, CA)
Kyoungsub Shin
Technologies for Enhancing Multi-Gate Si MOSFET Performance
2007
Samsung Electronics (Republic of Korea)
Yeh-Jiun Tung
Polycrystalline Silicon Thin-Film Transistor Technology for Flexible Large-Area Electronics
2001
Qualcomm MEMS Technologies (San Jose, CA)
Varadarajan Vidya
Thin-Body FET Devices and Technology
2007
IBM Corporation (East Fishkill, NY)
Hiu Yung Wong
Advanced gate processes for nanoscale CMOS 2006
Spansion (Sunnyvale, CA)

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STUDENTS SERVED AS Ph.D. RESEARCH CO-ADVISOR

NAME
PhD THESIS
graduated
EMPLOYER
Leland Chang
Nanoscale Thin-Body CMOS Devices
2003
IBM Corporation (Yorktown Heights, NY)
Yang-Kyu Choi
Nanofabrication Technologies and Novel Device Structures for Nanoscale CMOS
2001
KAIST (Republic of Korea)
Daewon Ha
Advanced materials and structures for nanoscale CMOS 2004
Samsung Electronics (Republic of Korea)
John M. Heck
Polycrystalline Silicon Germanium for Fabrication, Release, and Packaging of Microelectromechanical Systems
2001
Intel Corporation (Santa Clara, CA)
Ya-Chin King
Thin Dielectric Technology and Memory Devices
1999
National Tsing Hua University (Hsinchu, Taiwan R.O.C.)
Charles Kuo
Scaling CMOS Memories
2002
Intel Corporation (Santa Clara, CA)
Wen-Chin Lee
Poly-Si1-xGex Gate Technology and Direct-Tunneling Oxide for Deep-Submicron CMOS Application
1999
Taiwan Semiconductor Manufacturing Company (Hsinchu, Taiwan R.O.C.)
Nick Lindert
Process Development and Device Design for Continued MOSFET Scaling
2001
Intel Corporation (Hillsboro, OR)
Gang Liu
CMOS Power Amplifiers
2006
Marvell Semiconductor, Inc. (Milpitas, CA)
Carrie W. Low
Novel Processes for Modular Integration of SiGe MEMS with CMOS Electronics
2006
Silicon Clocks, Inc. (Fremont, CA)
Qiang Lu
Advanced Gate Stack Materials and Processes for Sub-100nm CMOS Applications
2002
Synopsys (Mountain View, CA)
Igor Polishchuk
Gate Stack for Sub-50nm CMOS Devices: Materials, Engineering and Modeling
2002
Cypress Semiconductor (San Jose, CA)
Kevin Yang
Characterization and Modeling of Advanced Gate Dielectrics
2002
T-RAM Semiconductor, Inc. (Milpitas, CA)
Yee-Chia Yeo
Gate-Stack and Channel Engineering for Advanced CMOS Technology
2002
National University of Singapore (Singapore)

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Last updated June 26, 2008