NAME
|
PhD THESIS
|
graduated
|
EMPLOYER
|
Leland Chang
|
Nanoscale Thin-Body CMOS
Devices
|
2003
|
IBM Corporation
(Yorktown
Heights, NY)
|
Yang-Kyu Choi
|
Nanofabrication
Technologies and Novel Device Structures for Nanoscale CMOS
|
2001
|
KAIST (Republic of Korea)
|
Daewon Ha
|
Advanced materials and
structures for nanoscale CMOS |
2004
|
Samsung Electronics
(Republic of Korea) |
John M. Heck
|
Polycrystalline Silicon
Germanium for Fabrication, Release, and Packaging of
Microelectromechanical Systems
|
2001
|
Intel Corporation (Santa Clara, CA)
|
Ya-Chin King
|
Thin Dielectric Technology
and Memory Devices
|
1999
|
National Tsing Hua University
(Hsinchu, Taiwan R.O.C.) |
Charles Kuo
|
Scaling CMOS Memories
|
2002
|
Intel Corporation (Santa Clara, CA) |
Wen-Chin Lee
|
Poly-Si1-xGex
Gate
Technology and Direct-Tunneling Oxide for Deep-Submicron CMOS
Application
|
1999
|
Taiwan Semiconductor Manufacturing Company
(Hsinchu, Taiwan R.O.C.) |
Nick Lindert
|
Process Development and
Device Design for Continued MOSFET Scaling
|
2001
|
Intel Corporation (Hillsboro, OR) |
Gang Liu
|
CMOS Power Amplifiers
|
2006
|
Marvell Semiconductor, Inc.
(Milpitas, CA)
|
Carrie W. Low
|
Novel Processes for
Modular Integration of SiGe MEMS with CMOS Electronics
|
2006
|
Silicon Clocks, Inc.
(Fremont, CA)
|
Qiang Lu
|
Advanced Gate Stack
Materials and Processes for Sub-100nm CMOS Applications
|
2002
|
Synopsys (Mountain View, CA)
|
Igor Polishchuk
|
Gate Stack for Sub-50nm
CMOS Devices: Materials, Engineering and Modeling
|
2002
|
Cypress Semiconductor (San Jose, CA)
|
Kevin Yang
|
Characterization and
Modeling of Advanced Gate Dielectrics
|
2002
|
T-RAM Semiconductor, Inc. (Milpitas,
CA)
|
Yee-Chia Yeo
|
Gate-Stack and Channel
Engineering for Advanced CMOS Technology
|
2002
|
National University of Singapore
(Singapore)
|