System-Level Design for Wireless Sensor Networks

Abhijit Davare

Alvise Bonivento

CS 294-1 Project

Fall 2003


Final project report [PDF]

Implementation files: DataCollector.nc, DataCollectorM.nc, lossy.nss

Poster [PDF]


Introduction

As hardware devices continue to get cheaper due to Moore’s law, the cost of sensor network nodes will continue to decline. As the commoditization of sensor networks continues, more research will shift from constructing and designing sensor network architectures to quickly prototyping applications. However, like other concurrent systems, sensor networks are notoriously difficult to program. The introduction of a platform-based design methodology for sensor networks will become necessary. The ability to cheaply program a diverse set of applications onto a single sensor network platform will benefit both customers and designers.

The key to programming sensor network nodes is the translation – or mapping – of system-level requirements to node-level requirements. Traditional embedded system design techniques can then be used to map the node-level requirements onto the node platform (e.g. Mica). The goal of our project will be to develop a framework for top-down propagation of system level constraints into node level constraints.

We propose the following changes to the Y-chart to produce the “YY-chart” shown below. To realize the goals of this project within the timeframe of the semester, we will restrict ourselves to a restricted set of applications - ConvergeCast.

Related Work

To our knowledge, there has been no work done on applying traditional embedded system design techniques to loosely coupled networked systems. However, we have identified publications in 5 related areas that will provide us with the necessary background information.

(a) Platform-Based Design

    [6] introduces the concept of platform-based design and gives some of the advantages of separating functionality from architecture and computation from communication.

    [5] introduces the Metropolis design environment and discusses some of the design challenges that such a unified design environment addresses.

    [7] defines system-level design and motivates this process by applying it to several examples.

    [8] defines the terms abstraction and refinement and shows how these properties are useful from a theoretical point of view.

(b) Lossy Channels

    [3] is a study on the channels and radio for the Picoradio project. It also describes some experiments that show how time-varying channels are a fact in this domain.

    [2] is the Smart Dust paper where they claim that channels attenuate transmitted power much more than quadratic on distance (up to the power of 6).

(c) Cross-Layer Optimizations

    [1] is one of the first examples on how cross layer optimization can save energy in a protocol stack - in this case eliminating continuous access to memory by different layers.

(d) Probabilistic Static Timing Analysis

    [4] is an introduction to probabilistic STA that also provides a framework for abstracting the probabilistic nature of gates and computing bounds on the distribution of path delays.

(e) Building Reliable Systems from Unreliable Components

    [9] shows how fault-modeling can be abstracted to the system level.

Overview

Input:

Application

Sampling rate/unit area

Constraints: End-to-End delay (from sensing to data collection), throughput, Network Lifetime

Optimize: Avg. Power, Variation in Power, Max. Power, Number of nodes

Network Platform

Sampling rate, Sampling range, Buffering capabiliies, Radio range, Physical layer, Power model (transmit, receive, idle, computation, sense, sleep), Channel model (attenuation, fading interference, SNR)

Protocol Library

Routing, MAC, PHY, Sleeping

Output:

Network topology, node density, and a selection of library components

Bibliography

  1. D. Clark and D. Tennenhouse. Architectural considerations for a new generation of protocols. In Computer Communication Review, ACM SIGCOMM ’90 Symposium. Communications Architectures and Protocols, Philadelphia, PA, USA, volume 20, pages 200–8, September 1990.
  2. L. Doherty, B.A. Warneke, B.E. Boser, and K.S.J. Pister, "Energy and Performance Considerations for Smart Dust." International Journal of Parallel Distributed Systems and Networks, Volume 4, Number 3, 2001, pp. 121-133.
  3. R. Stutz, "Performance Analysis and Optimization of a 2.4GHz, Multi-Hop, Wireless Self-Configurable Network", M.S. Thesis, Ecole Polytechnique Federale de Lausanne, 2003.
  4. Michael Orshansky, Kurt Keutzer: A general probabilistic framework for worst case timing analysis. DAC 2002: 556-561
  5. Balarin F, Watanabe Y, Hsieh H, Lavagno L, Passerone C, Sangiovanni-Vincentelli A. Metropolis: an integrated electronic system design environment. [Journal Paper] Computer, vol.36, no.4, April 2003, pp.45-52. Publisher: IEEE Comput. Soc, USA.
  6. K. Keutzer, A. R. Newton, J. Rabaey, A. Sangiovanni-Vincentelli System-level design: orthogonalization of concerns and platform-based design  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.19, (no.12), IEEE, Dec. 2000
  7. A. Sangiovanni-Vincentelli, A. Ferrari System Design - Traditional Concepts and New Paradigms  Proceedings of ICCD 99, Austin, October, 1999, pp.2-12
  8. J. R. Burch, R. Passerone, A. L. Sangiovanni-Vincentelli Using Multiple Levels of Abstractions in Embedded Software Design  Proceedings of the second International Conference on Application of Concurrency to System Design, June, 2001
  9. Z. Kalbarczyk, R.K. Iyer, G.L. Ries, J.U. Patel, M.S. Lee, and Y. Xiao, Hierarchical Simulation Approach to Accurate Fault Modeling for System Dependability Evaluation, IEEE Transactions on Software Engineering, vol. 25, no.5, September/October 1999, pp.619-632.